Sharp Kabushiki Kaisha Corporation

Koichi Kawaguchi

Kazuya Aoki

Kenichi Shiraishi

Hiroaki Nogami

Hironobu Katayama

Saori Akimoto

Ichiro Konno

A synchronism detection and demodulating circuit includes: a circuit for frequency dividing the regenerative clock in an irregular manner, a circuit for reading out the input data in a special manner based on the clock and producing data that provides information about the readout data, and a circuit for deleting unnecessary data from the readout data based on the data providing the information.

Synchronism detection and demodulating circuit

A digital VTR which is able to record a band-compressed signal having a bit-rate of 17 to 60 Mbps of a program while creating a low-bit-rate signal (1.5 to 5 Mbps) having the same program content as well as utilizing the low-bit-rate signal as a signal for the special playback. Variable speed playback data for a certain speed, which is recorded in the limited recording areas for variable-speed playback mode, is adapted to be used for playback at another speed in the variable-speed playback mode. The data structure of variable-speed playback data is adapted to change depending on the image areas on the image frame. Either of these embodiments or the combination of them, improves the quality of a reproduced picture during variable-speed playback mode in which a less amount of data is available than that of data read out at the time of a normal playback mode.

Recording and playback system for variable speed playback wherein more

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Chiba, Japan

Koichi Kawaguchi