Iwatsu Electric Company Ltd.

Koichi Ichimura

Yuji Kondo

Masaru Miyamoto

Yoshihiro Kawata

Atsushi Fujimoto

Hideharu Omori

Akira Hirato

Naoyuki Yamaguchi

A decision feed back equalizer provides two feedback routines for one symbol-preceding decided data. The signal space is separated into decidable areas and uncertainty areas. Within each of decidable area the distance between any point and the signal point is small. Within each uncertainty area the distance between any point and the signal point is large. If the symbol-preceding equalized signal is in a decidable area, the piece of decided data is fed back, as it is presumed to be correct. If the symbol-preceding equalized signal exists in an uncertainty area, the piece of decided data is not fed back, as it is presumed to be in error. Here the one piece data is selected from all the predicted symbol-preceding decided data so that the instant equalized data is now in the decidable area. This piece of decided data is now fed back.

Decision feedback equalizer

A synchronizing system in a digital communication line comprises a plurality of local switches for storing at least one digital line and monitoring a first piece of busy information when a clock source is already present, the local switches, if a first new clock source occurs while the first busy information is indicating no busy state, being capable of transmitting a master right request to turn the busy information to the busy state and to specify the first new clock source as a master clock and, on receiving a master right specification with respect to the master right request, being capable of outputting the first new clock source as the master clock; and a master switch connected to the plurality local switches in a star manner, by a link transmission line for transmitting control information including the master clock, master right request and master right specification, for monitoring a second piece of busy information indicating a busy state, the master switch, if a second new clock source occurs while the second busy information is indicating no busy state, being capable of transmitting the second new clock source as a master clock and, if the second new clock source competes with the first new clock source in the local switches that has output the master right request, being capable of arbitrating the competition between the first and second new clock sources and selecting one of the clock sources to turn the busy information to the busy state and, if the first clock source is selected, outputting the master right specification to the local switches that have transmitted the master right request.

Synchronizing system in digital communication line

Growing community of inventors

Saitama, Japan

Koichi Ichimura