Sony Corporation

Isra Vision Gmbh

Koichi Harada

Kazuya Yonemoto

Tetsuya Iizuka

Kazushi Wada

Satoshi Nakamura

Michio Yamamura

Stefan Leute

Methods for optically inspecting a surface () of an object () and an inspection device () including are described. With the method a temporally periodic pattern () with different illumination patterns () is generated on the surface () via a illumination device () of the inspection device () during an image recording sequence (), and in the image recording sequence a number of images of the pattern () on the surface () are recorded via an image recording device () of the inspection device (), wherein generating one of the different illumination patterns () is synchronised, respectively, with the image recording of one of the images of the pattern (), the phase of the pattern () is determined from the succession of the recorded known illumination patterns () in at least one image point and defects () on the surface () are detected from deviations of the recorded illumination pattern () from the generated known illumination pattern ().

Method and inspection device for optically inspecting a surface

A solid-state imaging device includes a plurality of sensor portions, and a vertical shift register corresponding to each of a series of sensor portions. A transfer electrode of the vertical shift register is formed of a first electrode and a second electrode which are repeatedly provided corresponding to the respective series of sensor portions and also formed continuously between the sensor portions adjacent to each other in the vertical direction. A signal charge is read out from each of the sensor portions through a portion below a read gate portion of the first electrode between sensor portions a located in the vertical direction.

Solid-state imaging device and a method of reading a signal charge in a solid-state imaging device which can reduce smear and can provide an excellent image characteristic

A solid-state imaging device includes a plurality of sensor portions, and a vertical shift register corresponding to each of a series of sensor portions. A transfer electrode of the vertical shift register is formed of a first electrode and a second electrode which are repeatedly provided corresponding to the respective series of sensor portions and also formed continuously between the sensor portions adjacent to each other in the vertical direction. A signal charge is read out from each of the sensor portions through a portion below a read gate portion of the first electrode between sensor portions located in the vertical direction.

Solid-state imaging device

An interline transfer or frame interline transfer CCD solid image sensor is adapted to read out signal charges from light receiving sections of a matrix array by means of vertical charge transfer sections and horizontal charge transfer sections. A plurality of horizontal charge transfer sections are formed for lowering the horizontal transfer frequency. The voltage transition in the transfer gate across the horizontal charge transfer sections is caused to occur stepwise or temporally slowly to improve the transfer efficiency across the horizontal charge transfer sections. A smear drain region for sweeping out unnecessary charges is formed along the horizontal charge transfer sections. The transfer electrode of the horizontal charge transfer sections connected to the busline wiring is patterned to clear contact holes provided in the smear drain region to provide for positive overflow without increasing the chip area.

Solid state image sensor

A structure of a solid-state image sensing device applicable to an HDVS is disclosed in which at least one of the transmission paths for the drive pulses used for driving vertical registers and horizontal registers can achieve reduced propagation delays and signal distortions of the drive pulses. In the first preferred embodiment, a control gate for controlling the transfer of signal charges between the horizontal registers is constituted by a first polycrystalline silicon layer, a metal wiring layer is formed and is connected to the first polycrystalline silicon layer via contact regions and transfer electrodes provided for driving the horizontal registers are constituted by second and third semiconductor layers placed between the first polycrystalline silicon layer and the metal wiring layer without contacting the contact regions. In the second preferred embodiment, the control gate is formed of a wiring layer placed above the semiconductor layers constituting the transfer electrodes of the horizontal registers. In the third preferred embodiment, shunt wiring films are formed independently on the transfer electrodes for the vertical registers of an image portion and on the transfer electrodes for those of a storage portion.

Structure of solid-state image sensing devices

With the CCD imager of the present invention, signal charges from the image area are transferred by plural juxtaposed read-out registers. The storage region of the read-out registers, through which electrical charges are transmitted, is narrower in width at the image area side and broader in width at the other read-out register side. By virtue of such arrangement of the storage area, there is formed a potential which becomes shallow at the side of the image area and becomes deep at the side of the other read-out registers. By such potential, signal charge transfer efficiency between the read-out registers is improved.

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Kanagawa, Japan

Koichi Harada