Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kohsuke Harada

Akihiro Yamazaki

Hironori Uchikawa

Nobuhiro Maeto

Tomokazu Okubo

Tsuguhide Aoki

Kenji Yoshida

Naoki Tagami

Yasuhiko Tanabe

Daisuke Takeda

Kazuto Kashiwagi

Hitoshi Iwasaki

Masayuki Takagishi

Hiroaki Nakamura

Hiroshi Sukegawa

Kenichiro Yamada

Hiroshi Yao

Osamu Torii

Riki Suzuki

Yousuke Isowaki

Yasushi Tomizawa

Shinji Takakura

Yoshimasa Egashira

Naoaki Kokubun

Yosuke Kondo

Haruka Obata

Yoshiyuki Ishihara

Kazuhito Ichihara

Masahiro Kanamaru

According to one embodiment, in a storage device, a selection circuit selects one mapping rule from a plurality of mapping rules in which each of bit labels having a bit length of (n+1) or more is mapped to n M-ary symbols, when M is defined as an integer of 3 or more and n is defined as an integer of or more. A first conversion circuit converts a data block in data into an M-ary symbol sequence using the selected one mapping rule. A second conversion circuit converts the converted M-ary symbol sequence into an M-step pulse width signal. The recording medium records the converted M-step pulse width signal. A readback circuit equalizes the signal read from the recording medium to the M-ary symbol sequence and restores the data.

Storage device and storage method

According to one embodiment, there is provided a storage device including a controller circuit and a storage medium. The controller circuit includes a first conversion circuit and a second conversion circuit. The first conversion circuit converts data into M-ary symbols where M is an integer of 3 or more. The second conversion circuit converts respective ones of the converted n samples of M-ary symbols into signals with L-patterned pulse width where n is an integer of 2 or more. The storage medium stores the converted n samples of signals with L-patterned pulse width. The controller circuit further includes an equalization circuit that equalizes signals read from the storage medium into the n samples of M-ary symbols.

Storage device, controller circuit, and writing and reading method

A memory system according to an embodiment includes a plurality of magnetic nanowires, a read unit that reads data from the magnetic nanowires, a shift control unit that shifts domain walls in the magnetic nanowires, and a read control unit. The read control unit is configured to control the read unit to read the data from the magnetic nanowires in parallel, store two or more of the data read in parallel, and when the data corresponding to a first magnetic nanowire of the magnetic nanowires are delayed or advanced as compared to the data corresponding to a second magnetic nanowire of the magnetic nanowires, determines a misalignment in the data and correct the data based on the misalignment.

Memory system, method for controlling magnetic memory, and device for controlling magnetic memory

According to one embodiment, there is provided a storage device including a data converter, a recording medium, and an equalizer. The data converter converts data into sets of n number of four-ary symbols according to mapping rules in which 2or fewer types of bit labels are mapped onto the n number of four-ary symbols, where n is an integer of two or greater. Onto the recording medium, the converted n number of four-ary symbols are recorded in the form of a signal of one level among four levels. The equalizer equalizes a signal read from the recording medium into sets of the n number of four-ary symbols.

Storage device, controller, and recording and reproducing method

According to one embodiment, a storage device comprises a nonvolatile memory and a memory controller that performs reading and writing data from and into the nonvolatile memory. A number, not being 2, of threshold areas can be set in the memory cells of the nonvolatile memory. The memory controller performs first writing based on first data value assignment, which sets 2data values to correspond to 2threshold areas, in first-time writing into a first memory cell of the nonvolatile memory and performs second writing on the first memory cell after the first writing without erasing data based on second data value assignment, which sets 2data values to correspond to 2threshold areas including threshold areas not used in the first data value assignment.

Storage device, memory controller and memory control method

According to one embodiment, a magnetic recording and reproducing device includes magnetic recording medium and a magnetic head. The magnetic recording medium includes a first surface. A plurality of bits is provided in the first surface. Each of the bits has a direction of magnetization corresponding to recorded information. The magnetic head includes a reproducing unit. The reproducing unit senses the direction of magnetization. The reproducing unit includes a first shield, a second shield, a first magnetic layer, a second magnetic layer, a third magnetic layer, a fourth magnetic layer, an intermediate layer, a first nonmagnetic layer, and a second nonmagnetic layer. The first and the second nonmagnetic layers include at least one selected from ruthenium, copper, and tantalum. A distance between the first shield and the second shield is not less than 3 times and not more than 7 times a length of each of the bits.

Magnetic recording and reproducing device

According to one embodiment, an equalizer is configured to obtain a noise included in a first correction signal by using a noise component of a first track and a noise interference component from a second track. The equalizer is configured to correct the first correction signal by using the obtained noise. The equalizer is configured to equalize the corrected first correction signal. The noise component of the first track is calculated based on a noise component of the first track at a first timing and a noise component of the first track at a second timing earlier than the first timing. The noise interference component from the second track is calculated based on a noise interference component from the second track at the first timing and a noise interference component from the second track at the second timing. The decoder is configured to decode the equalized first correction signal.

Controller, disk drive, and read processing method

According to one embodiment, a storage device includes a data conversion unit that coverts user data of n bits, into m three-ary symbols, a recording medium that records the symbols as a signal of any one of three levels corresponding to values of the symbols, and a Viterbi equalizer that performs equalization of the m symbols simultaneously based on a signal read from the recording medium while setting the number of states as a power of 3 and using a trellis diagram having 2branches, and calculates 2likelihoods.

According to one embodiment, switching takes place between a first control in which a first read head is assigned as a master head for reading data from a magnetic disk on which a sequential write direction is reversed at a switching position where a skew angle of a write head becomes 0 and between an outer periphery and an inner periphery in shingled write recording, and a second read head is assigned as a slave head for reducing inter-track interference during reading of the data and noise by virtue of an effect of waveform averaging with respect to the master head, and a second control in which the second read head is assigned as the master head and the first read head is assigned as the slave head.

Magnetic disk device and read control method

According to one embodiment, there is provided a controller including an interference cancelling module, a boosting module, and a decoding module. The interference cancelling module generates a first correction signal by cancelling an interference component from an adjacent track in a signal read from a target track of a disk medium. The boosting module generates a second correction signal by boosting a low frequency component of a signal corresponding to the first correction signal. The decoding module decodes a signal based on the second correction signal.

Controller, disk drive, and read-back signal processing method

According to one embodiment, a signal processing device comprises a first waveform equalizer, a second waveform equalizer, a first Viterbi decoder, a second Viterbi decoder. The first and the second waveform equalizers equalize a waveform of the input signal according to first and second partial response characteristics and output first and second partial response signals. The first and second Viterbi decoders decode the first and the second partial response signals by means of Viterbi decoding process. The input signal is reproduced based on an output of the first Viterbi decoder and an output of the second Viterbi decoder.

Signal processing device, signal processing method, and signal reproducing apparatus

There is provided with a decoding apparatus for decoding a low-density parity check code defined by a parity check matrix, includes: a first operation unit configured to carry out a row operation for each row of the parity check matrix; a calculation unit configured to calculate a reliability coefficient with respect to establishment of a parity check equation defined by said each row, respectively; a second operation unit configured to carry out a column operation for said each row; and a controller configured to iteratively execute one set which includes respective processing by the first operation unit, the calculation unit and the second operation unit and omit the processing by the first operation unit and the calculation unit for a row for which the reliability coefficient has satisfied a threshold.

Apparatus and method for decoding low-density parity check code

A magnetic disk apparatus includes a magnetic disk that includes a plurality of zones in which a plurality of tracks are arranged for each of circumferences of a spiral, and gaps that are arranged between the zones to have a width a predetermined number of times larger than a track width and that are regions without providing recording bits; and a reproducing element that simultaneously makes an access to the recording bits contained in the tracks, reading information stored in the recording bits, wherein the number of the tracks is one or larger and a sum of one and the predetermined number or smaller in one of the zones.

Magnetic disk apparatus and information reproducing method

A decoder is configured to include an acquisition-unit configured to acquire first respective likelihoods of data-bits and second respective likelihoods of parity-bits. The data-bits and the parity-bits are included in code data obtained by LDPC-encoding the data-bits with a low density parity check matrix. The decoder also includes a detecting-unit configured to detect reliabilities of the first respective likelihoods and the second respective likelihoods. The decoder also includes a forming-unit configured to form an update schedule representing an order of updating the first and second respective likelihoods in order of increasing reliability, in accordance with the reliabilities. The decoder also includes an updating-unit configured to update the first and second respective likelihoods in the order represented by the update schedule, with the low density parity check matrix. The decoder also includes a discriminating-unit configured to execute hard decision of the likelihoods updated by the updating-unit. The decoder also includes a checking-unit configured to execute parity check of a discrimination result of the discriminating-unit, to obtain the code data.

Apparatus, method and program for decoding

A readback apparatus (a) calculates a variance value of a signal read by a head from a disc medium, (b) estimates a degree of offtracking of the head from a target track to an adjacent track, and interference power from the adjacent track using the variance value of the signal, (c) calculates a soft decision likelihood value for the signal using the degree of offtracking and the interference power, and (d) performs error correcting decoding using the soft decision likelihood value.

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Yokohama, Japan

Kohsuke Harada