Pioneer Electronic Corporation

Kohji Ishida

Tatsuo Numata

Masaharu Sakamoto

Tadashi Noguchi

Yasushi Nishimura

Shigeru Yamaguchi

Kiyoshi Ohtaki

A noise reduction apparatus in an FM stereo tuner including a circuit for generating a stereo sum signal and a stereo differential signal; a noise eliminating circuit for dividing, in accordance with several frequency bands, the stereo differential signal into several divisional signals and for outputting, in accordance with signals levels corresponding to the frequency bands, a composite signal of divisional stereo differential signals respectively corresponding to the signal levels; and a circuit for reproducing a stereo signal from the composite signal and the stereo sum signal. In another embodiment, the noise reduction apparatus includes a circuit for generating a stereo sum signal and a first stereo differential signal; a noise eliminating circuit for dividing the stereo sum signal and the first stereo differential signal into several divisional differential signals and several divisional sum signals, for eliminating a low-level divisional stereo differential signal in each of the frequency bands to generate a second stereo differential signal, and for outputting a composite signal representing the second stereo differential signal and those divisional stereo sum signals in the same divisional band as the eliminated divisional stereo differential signals; and a circuit for reproducing a stereo signal from the composite signal and the stereo sum signal.

Noise reduction apparatus in an FM stereo tuner

A noise reduction apparatus in an FM stereo tuner including a circuit for generating a stereo sum signal and a stereo differential signal; a noise eliminating circuit for dividing, in accordance with several frequency bands, the stereo differential signal into several divisional signals and for outputting, in accordance with signals levels corresponding to the frequency bands, a composite signal of divisional stereo differential signals respectively corresponding to the signal levels; and a circuit for reproducing a stereo signal from the composite signal and the stereo sum signal. In another embodiment, the noise reduction apparatus includes a circuit for generating a stereo sum signal and a first stereo differential signal; a noise eliminating circuit for dividing the stereo sum signal and the first stereo differential signal into several division differential signals and several divisional sum signals, for eliminating a low-level divisional stereo differential signal in each of the frequency bands to generate a second stereo differential signal, and for outputting a composite signal representing the second stereo differential signal and those divisional stereo sum signals in the same divisional band as the eliminated divisional stereo differential signals; and a circuit for reproducing a stereo signal from the composite signal and the stereo sum signal.

A low-pass filter circuit for suppressing a subcarrier contained in an FM stereo demodulation signal in which the output signal of the circuit is unaffected by magnetic distortion. The FM stereo demodulation signal is applied through a low-pass filter to n sample-and-hold circuits connected in parallel with one another. The outputs of the sample-and-hold circuits are summed to form an output signal in which the subcarrier signal has been suppressed. The n sample-and-hold circuits are driven with a corresponding number of sampling pulse signals of different phases.

Low-pass filter circuit

A multipath distortion reducing circuit particularly adapted for use with stereophonic receiving circuits in which the amount of mixing between right and left channels is reduced. In accordance with the invention, the envelope of the received FM signal is AM detected, and the envelope detected circuit is multiplied by the FM detected signal differentiated to provide a distortion cancelling signal. The distortion cancelling signal is summed with the detected FM signal to provide an output having a reduced multipath distortion component.

Multipath distortion reducing circuit

An FM stereo demodulating circuit comprising a pulse counter detector 1 for generating a pulse train signal including the frequency spectrum of the FM signal, DC biasing means for current biasing the detector output about a midpoint, a subcarrier signal generator 2 and current drivers 8, 10 for generating dual polarity biased subcarrier currents, first and second transistor pairs 3, 4, the emitters of each being connected to one of the current drivers, and the bases of the pairs being cross-connected to one of the biased detector outputs, at least one reference transistor pair whose emitters are connected to a current source 11 and whose collectors are connected to each of the biased detector outputs. The currents entering the cross-connected collectors of the first and second transistor pairs, when referenced against the currents into the emitters of the reference transistor pair, produce signals proportional to the right and left channels of the FM signal.

FM Stereo demodulating circuit

An FM receiver comprising a 90 degree phase shifter 21 of the FM signal and a first multiplier 22 for multiplying the FM signal and the phase shifted signal to produce a main signal L+R and a second multiplier 6 for multiplying the FM signal, the phase shifted signal and a subcarrier wave of 38 kHz to produce a sub-signal L-R.

FM receiver

Disclosed is a frequency converter circuitry having square-law transfer characteristics. In order to reduce undesirable harmonic components of the output signal, the circuitry comprises a plurality of active elements, each being responsive to respective harmonic components and having a characteristic adjusting means, connected in parallel with each other so as to provide an overall input/output transfer function approximating a square-law transfer characteristic.

Circuit having square-law transfer characteristic

Disclosed is an FM stereo demodulator in which components of the demodulated signal corresponding to odd harmonics of the subcarrier signal are eliminated. In order to prevent the production of odd harmonics, the multiplication between positive and negative sinusoidal subcarrier signals is performed with a stereo pilot signal and positive and negative pulse train signals produced by pulse detection of an FM signal. The multiplication signals are further added with each other to directly reproduce left and right stereophonic signals.

FM Stereo demodulator for demodulating stereo signals directly from an

An FM stereo demodulator having improved separation and distortion characteristics comprising a high-frequency pulse signal which is modulated by a sinusoidal subcarrier signal produced in accordance with a stereo pilot signal. The high-frequency pulse signal is multiplied with a composite signal at a multiplier so as to reproduce left and right signals without frequency components of noise. Constructed accordingly, the invention advantageously obviates the use of a low-pass filter which injects delay characteristics and reduces gain of the composite signal from an FM demodulator.

FM stereo demodulator

A pulse position modulated (PPM) signal is derived from an input FM signal, and first and second switching signals are derived which are opposite in phase and correspond to alternating half cycles of the PPM signal. First and second opposite phase subcarrier signals are derived synchronized to the pilot signal in the input FM signal, and various combinations of the switching and subcarrier signals are multiplied together and the multiplication products combined to obtain left and right channel outputs.

FM Stereo demodulation circuit

A multiplex demodulation circuit in which no band elimination filter is required for eliminating beating between the mixed signals and odd harmonics of the 38 KHz switching signal derived from the 19 KHz pilot signal. The FM detection signal is logarithmicly converted as is the 38 KHz subcarrier signal. The two logarithmically converted signals are added and then inversely logarithmically converted. The inversely logarithmically converted signal is added to the FM detection signal to produce the left channel signal while the inversely logarithmically converted signal is phase inverted then added to the FM detection signal to provide the right channel signal.

Multiplex demodulation circuit

An FM receiver in which the length of the signal path is significantly shortened and in which separation between right and left channels is implemented by adjusting a DC bias voltage. A pulse train signal having a frequency dependent upon the instantaneous frequency of the received FM signal is generated. Subcarrier signals in and out of phase with a pilot signal component in the pulse train signal are produced and a variable DC component is added thereto. The subcarrier signals including the DC component are multiplied to obtain pulse train signals. The pulse train signals are integrated to yield right and left stereophonic channel signals.

FM Receiver

A muting switching circuit for decoupling the output signal from an FM tuner including a transistor PNP-NPN pair push-pull connected between the terminals of a power source with a current mirror circuit supplying bias to the transistor pair in response to an input muting control signal. A middle point potential equal to one-half the voltage of the power source supplying current to the circuit is connected to a common connection point of the transistor pair so that when the transistors are rendered nonconductive by control of the input control signal, the common connection point thereof, which is also the output terminal of the circuit, is brought to the middle point potential immediately so that no pop noise is produced in the output signal. Preferably, a capacitor is coupled between the source of the middle point potential and ground to slow down transitions in the output signal when the power source is switched off or on to thereby prevent pop noise in the output signal at that time.

Switching circuit

A stereophonic signal demodulation circuit receives an input signal including a signal modulated with first and second channel information to separate the first and second channel information from each other. The circuit includes first and second operational amplifiers and at least two switching devices namely, first and second switches for applying the input signal through respective resistors to one input terminal of the first operational amplifier and third and fourth switches for applying the input signal through respective resistors to one input terminal of the second operational amplifier. A control device controls the operations of the first through fourth switches and the first and second operational amplifiers outputs first and second channel information, respectively.

Stereophonic signal demodulation circuit

A chopper type switching circuit having first and second transmission paths adapted to transmit a predetermined input signal to respective output terminals. First and second switching elements are connected respectively between the mid points of the first transmission path and a reference voltage line. A group of resistors are series connected between the output terminals. Third and fourth switching elements are connected respectively between the series connection points of the group of resistors and the reference voltage line. The first and fourth switching elements and the second and third switching elements are controlled to be alternately rendered conductive and non-conductive.

Growing community of inventors

Tokyo, Japan

Kohji Ishida