Victor Company of Japan, Limited

Kohhei Sasamura

Takaro Mori

Masaru Moriyama

In a circuit arrangement for magnetic recording apparatus having a multi-track head, a resistor network is provided so that each operational amplifier associated with each magnetic head included in the multi-track head functions as a constant-current circuit. The resistances of four resistors in the resistor network are selected so that no current flows via one resistor interposed between the output terminal of the operational amplifier and a terminal of the head in receipt of no input signal even if leakage flux emitted from adjacent head is picked up by the head. Therefore, undesirable influence due to crosstalk can be effectively prevented, providing high quality reproduction in the case of audio signal recording or low bit error rate in the case of digital recording.

Circuit arrangement for magnetic recording apparatus having a

A magnetic reproducing system reproduces a recording two-valued code signal from a magnetic recording medium, and detects the signal level of the reproduced signal to reproduce a digital signal of a desired two-valued code, where the recording two-valued code signal is obtained by passing the digital signal of the above desired two-valued code through a converter and a delay circuit and then feeding back this digital signal to carry out a modulo-2 addition. The magnetic recording medium is recorded with the above recording two-valued code signal. The magnetic reproducing system comprises a magnetic head for reproducing the two-valued code recorded on the magnetic recording medium, an equalizer for performing wave-equalization of the signal reproduced by the magnetic head, and a signal detection circuit for detecting the signal level of a three-valued code signal obtained from the above equalizer, to produce a two-valued detection signal in which signal levels corresponding to '+1' and '-1' of the three-valued code signal is set to a signal level '+1' and a signal level corresponding to '0' of the three-valued code signal is set to a signal level '0', as a reproduced output signal of the digital signal.

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Sagamihara, Japan

Kohhei Sasamura