Fuji Electric Co., Ltd.

Kohei Yamauchi

Hiromichi Gohara

Ryoichi Kato

Tatsuhiko Asai

Takafumi Yamada

Yoshitaka Nishimura

Katsumi Taniguchi

Yoshinari Ikeda

Akio Kitamura

Tatsuo Nishizawa

Souichi Yoshida

Shinji Tada

Eiji Anzai

Tomoyuki Hirayama

Takumi Nakamura

Yutaka Hirano

Hajime Masubuchi

A heat sink includes a base plate; a cover overlapping the base plate; fins, each having a plate-like shape projecting from the base plate in a direction perpendicular to the base plate, located between the base plate and the cover; one or a plurality of first fin groups composed of a plurality of the fins arranged with a gap therebetween in a first direction; and one or a plurality of second fin groups composed of a plurality of the fins arranged with a gap therebetween in the first direction, and adjacent to the first fin group with a gap therebetween in a second direction. Positions in the first direction of the fins belonging to the second fin group are displaced with respect to positions in the first direction of the fins belonging to the first fin group. Each of the fines has an S-shape.

Heat sink

A semiconductor module includes at least two semiconductor elements connected in parallel; a control circuit board placed between the at least two semiconductor elements; a control terminal for external connection; a first wiring member that connects the control terminal and the control circuit board; and a second wiring member that connects a control electrode of one of the at least two semiconductor elements and the control circuit board, wherein the second wiring member is wire-bonded from the control electrode towards the control circuit board, and has a first end on the control electrode and a second end on the control circuit board, the first end having a cut end face facing upward normal to a surface of the control electrode and the second end having a cut end face facing sideways parallel to a surface of the control circuit board.

Semiconductor module and wire bonding method

There is provided a semiconductor module including: a base for semiconductor cooling; a stacked substrate provided above the base; a semiconductor chip provided above the stacked substrate; a coating layer provided on an upper surface of the semiconductor chip; and a sealing resin for sealing the semiconductor chip, in which the base is in contact with the sealing resin.

Semiconductor module, vehicle, and method of manufacturing semiconductor module

A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.

Semiconductor device

A semiconductor device includes: a first cooling device including a plurality of first flow channels through which a fluid flows, between a first main surface and a second main surface opposed to each other; a second cooling device including a plurality of second flow channels through which a fluid flows, between a third main surface and a fourth main surface parallel to the first main surface; a semiconductor element interposed between the first main surface and the third main surface facing each other; and a control terminal penetrating from the third main surface to the fourth main surface in a terminal-penetrating region defined at a predetermined position between the plurality of second flow channels, and electrically connected to a control electrode of the semiconductor element.

Semiconductor device, cooling module, power converting device, and electric vehicle

A semiconductor module includes a semiconductor element having one and the other surface, a lead terminal connected electrically and thermally to the semiconductor element, a first solder which bonds the lead terminal and the one surface of the semiconductor element together, a circuit layer over which the semiconductor element is disposed and a second solder which bonds the other surface of the semiconductor element and the circuit layer together. The inequality()&#x3c;1

Semiconductor module

The semiconductor device includes a first insulating circuit substrate; a semiconductor chip including a plurality of control electrodes, disposed on the first insulating circuit substrate; a second insulating circuit substrate including a plurality of first through-holes in which conductive members are arranged on inner walls and/or an outer periphery of ends of the first through-holes, the second insulating circuit substrate being disposed above the semiconductor chips; and first pins inserted into the first through-holes and having at one end a columnar part connected to the control electrodes of the semiconductor chips, and having at another end a head part that is wider than an inner diameter of the first through-holes.

A semiconductor device includes: an upper-surface electrode on an upper surface of a semiconductor element; a plated layer on an upper surface of the upper-surface electrode; gate runners penetrating the plated layer and formed to extend above the upper surface of the semiconductor element; and a metal connecting plate arranged above the plated layer and electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion at an end of the joint portion, the rising portion extending in a direction away from the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, a first distance, which is a shortest distance between the rising portion and the gate runner not intersecting the rising portion, is equal to or longer than 1 mm.

A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.

Growing community of inventors

Matsumoto, Japan

Kohei Yamauchi