Kabushiki Kaisha Toshiba

Kioxia Corporation

Toshiba Memory Corporation

Infineon Technologies Ag

Kohei Oikawa

Keiri Nakanishi

Sho Kodama

Masato Sumiyoshi

Youhei Fukazawa

Daisuke Yashima

Takashi Miura

Zheye Wang

Shinichiro Shiratake

Daisaburo Takashima

Yoshiaki Takeuchi

Kojiro Suzuki

Tokumasa Hara

Kosuke Hatsuda

Kazuki Inoue

Kenichiro Yoshii

Osamu Torii

Riki Suzuki

Daisuke Miyashita

Mitsunori Tadokoro

Thomas Roehr

Kiyotaka Iwasaki

Kensaku Yamaguchi

Kenta Yasufuku

Ryo Yamaki

Daisuke Iwai

Takashi Takemoto

Naoaki Kokubun

Norikazu Yoshida

Hirotsugu Kajihara

Shirou Fujita

Shuou Nomura

Kazuhiro Hiwada

Ikuo Magaki

Yukimasa Miyamoto

Yu Nakanishi

Konosuke Watanabe

Naoto Oshiyama

Kejen Lin

Makiko Numata

A memory system includes a nonvolatile memory device and a controller configured to generate page data of a first predetermined size, which includes a plurality of error correction frames, each of which has a second predetermined size, and write the generated page data into the nonvolatile memory device. The plurality of error correction frames includes a first error correction frame and a second error correction frame. The first error correction frame includes first data and a first error correction data for correcting the first data. The second error correction frame includes second data and a second error correction data for correcting the second data. The first error correction frame and the second error correction frame partially overlap with each other. An overlapping area of the first and second error correction frames includes a part of the first data and a part of the second data.

Memory system and method

According to one embodiment, a memory system includes: a nonvolatile memory including blocks each of which includes physical memory areas; and a memory controller dividing a logical address space into a plurality of banks and associating a block with each of the plurality of banks. The memory controller is configured to: selectively scan a portion related to a first bank among the plurality of banks in a table in which a physical address corresponding to a physical memory area in which valid data is stored is mapped on the logical address space; detect a first physical address corresponding to a first physical memory area in a first block associated with the first bank as a result of the scan; read first valid data stored in the first block based on the first physical address; and write the first valid data in a second block associated with the first bank.

Memory system limiting range of scan in garbage collection

A memory system includes a non-volatile memory and a controller. The controller is configured to perform a write operation of a first data cluster and a first partial overwrite operation of the first data cluster with first overwrite data. The write operation includes compressing and then encrypting the first data cluster, and writing the compressed and encrypted first data cluster into a first physical location of the non-volatile memory. The first partial overwrite operation includes encrypting the first overwrite data without performing compression, reading the compressed and encrypted first data cluster from the first physical location of the non-volatile memory, generating a first composite data cluster with the compressed and encrypted first data cluster read from the first physical location and the encrypted first overwrite data that is not compressed, and writing the first composite data cluster into a second physical location of the non-volatile memory.

Memory system

A memory system includes a non-volatile memory, a buffer memory, and a controller configured to write data to the non-volatile memory in write units of a predefined size, each write unit including a plurality of data items and log data and to temporarily store the data items and the log data of each write unit in the buffer memory prior to writing the write unit to the non-volatile memory. In response to a write command, the controller calculates a total data size of the data items of the write unit and write data specified in the write command, and a total log size of the log data and log information associated with the write data, and in response to determining that the total data size or the total log size is greater than their respective thresholds, writes the write unit stored in the buffer memory to the non-volatile memory.

According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.

According to one embodiment, a dictionary buffer stores dictionary data including a first substring and data before the first substring. A substring generator generates, from second input data, second substrings. A transformer transforms each of the second substrings into a hash value. A read processor reads the dictionary data, using a hash value transformed from a third substring among the second substrings. An acquisition unit compares a data string including the third substring and data before the third substring with the read dictionary data, and acquire first and second match lengths of the third and fourth substrings. A coded data generator generates coded data based on the acquired first and second match lengths.

Dictionary compression device and memory system

A compression device includes an analyzer circuit, a control circuit, a compressor circuit, and a selector circuit. The analyzer circuit is configured to analyze first data that is input thereto and generate one or more parameter values regarding data compression and/or decompression. The control circuit is configured to generate at least one compression mode information indicating whether or not compression is to be performed, based on the one or more parameter values. The compressor circuit is configured to compress the first data into second data according to the compression mode information. The selector circuit is configured to output the first data if not compressed or the second data if the first data is compressed, together with the compression mode information.

Compression device, compression and decompression device, and memory system

According to one embodiment, a compression device includes a first storage unit, a second storage unit, a calculation unit, and a comparison unit. The first storage unit stores addresses associated with hash values, respectively. The second storage unit includes storage areas specified by the addresses, respectively. The calculation unit determines a hash function to be used for first data in accordance with at least a part of the first data, and calculates a hash value using the hash function and at least a part of second data included in the first data. The comparison unit acquires third data from a storage area in the second storage unit specified by a first address, and compares the second data with the third data. The first address is stored in the first storage unit and is associated with the hash value.

Compression device and control method

According to one embodiment, a data decompression device includes: a detection circuit configured to detect a boundary between a header and a payload in a compressed stream, based on boundary information in the header; a separation circuit configured to separate the header and the payload; a first decompression circuit configured to decompress a compressed coding table in the header; and a second decompression circuit configured to decompress the payload, based on an output of the first decompression circuit.

Data decompression device, data compression device, and memory system

According to one embodiment, a data compression device includes a dictionary match determination unit, an extended matching generator, a match selector and a match connector. The dictionary match determination unit searches for first past input data matching first new input data. The extended matching generator compares second past input data subsequent to the first past input data with second new input data subsequent to the first new input data. The match selector generates compressed data by replacing a part of the input data with match information output from the dictionary match determination unit or the extended matching generator. The match connector replaces a plurality of match information in the compressed data with single match information.

Data compression device, memory system and method

According to one embodiment, an interleaving unit divides a symbol string into first and second symbols. A first coding unit converts the first symbols to first codewords. A first packet generating unit generates first packets including the first codewords. A first request generating unit generates first packet requests including sizes of variable length packets. A second coding unit converts the second symbols to second codewords. A second packet generating unit generates second packets including the second codewords. A second request generating unit generates second packet requests including sizes of variable length packets. A multiplexer outputs a compressed stream including the first and second variable length packets cut out from the first and second packets.

Compression device and decompression device

According to one embodiment, a memory system includes a compressor configured to output second data obtained by compressing input first data and a non-volatile memory to which third data based on the second data output from the compressor is written. The compressor includes a dictionary coding unit configured to perform dictionary coding on the first data, an entropy coding unit configured to perform entropy coding on the result of the dictionary coding, a first calculation unit configured to calculate compression efficiencies of the dictionary coding and the entropy coding, and a first control unit configured to control an operation of at least one of the dictionary coding unit and the entropy coding unit based on the compression efficiencies and a power reduction level.

A memory system includes a non-volatile memory and a controller. The controller is configured to, during a writing operation, generate a first error-detecting code from data that is input, perform a predetermined conversion on the data into first conversion data, generate a second error-detecting code from the first conversion data, and store the data, the first error-detecting code, and the second-error detecting code in the non-volatile memory. The controller is configured to during a read operation, read the data, the first error-detecting code, and the second error-detecting code from the non-volatile memory, perform a first error detection on the data using the first error-detecting code, perform the predetermined conversion on the data into second conversion data, perform a second error detection on the second conversion data using the second error-detecting code, and output the second conversion data based on results of the first and second error detections.

Error detection in memory system

A memory system includes a first memory that is nonvolatile, a second memory that is volatile, and a memory controller. The memory controller is configured to store first information in the second memory. The first information includes management information. The memory controller is further configured to compress the first information. The compressed first information is second information. The memory controller is configured to store the second information in the first memory.

Growing community of inventors

Kawasaki, Japan

Kohei Oikawa