Mitsubishi Electric Corporation

Ias, Inc

Kohei Nishiguchi

Katsuhiko Kawabata

Tatsuya Ichinose

Yoshihiro Tsukahara

Takeshi Yuasa

Shinichi Miyakuni

Kiyoshi Ishida

Kohei Miki

A semiconductor wafer device according to the present invention includes a SiC substrate having an upper surface and a rear surface as a surface on the opposite side to the upper surface, and an impurity implantation layer provided on the entire rear surface of the SiC substrate, formed of a same base material as that forming the SiC substrate, including an impurity, and having a lower transmittance of visible light or infrared light than that of the SiC substrate.

Semiconductor wafer and method for manufacturing semiconductor device

A method for analyzing a sample containing metal fine particles with an inductively coupled plasma mass spectrometer. The method enables analysis of the sample without the need of standard metal fine particles. Specifically, the present invention relates to a method for analyzing metal fine particles in liquid by use of an inductively coupled plasma mass spectrometer. In the method, the analysis apparatus is provided with a standard solution introduction apparatus including a standard solution storage unit for storing a standard solution containing a specific element in a known concentration, a syringe pump for suctioning and discharging the standard solution, and a solution introduction unit having a standard solution nebulizer and a standard solution spray chamber that are supplied with the standard solution, the standard solution is directly supplied to the standard solution nebulizer at a flow rate of 3 μL/min or less.

Method for analyzing metal microparticles, and inductively coupled plasma mass spectrometry method

Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.

Semiconductor element comprising a MIM capacitor and a via hole, a bottom of the via hole being placed between a rear surface of a source electrode and a rear surface of a barrier metal layer

The present invention provides a method for analyzing a sample containing metal fine particles with an inductive coupling plasma mass spectrometer. The method enables analysis of the sample without the need of standard metal fine particles. Specifically, the present invention relates to a method for analyzing metal fine particles in liquid by use of an inductive coupling plasma mass spectrometer. In the method, the analysis apparatus is provided with a standard solution introduction apparatus including a standard solution storage unit for storing a standard solution containing a specific element in a known concentration, a syringe pump for suctioning and discharging the standard solution, and a solution introduction unit having a standard solution nebulizer and a standard solution spray chamber that are supplied with the standard solution, the standard solution is directly supplied to the standard solution nebulizer at a flow rate of 3 &#x3bc;L/min or less.

Method for analyzing metal fine particles, and inductively coupled plasma mass spectrometry method

A method for manufacturing a semiconductor device () includes, in the following order: forming a first insulating film () on a semiconductor substrate (); forming, on the first insulating film (), wiring in which at least the uppermost layer is made of Au (); implanting ions, which do not impair insulating properties even when implanted into the insulating film (), into the upper surface of the wiring () and a region not covered with the wiring () on the upper surface of the first insulating film (); and forming a second insulating film () that covers the wiring ().

Method for manufacturing semiconductor device and semiconductor device

Included are forming, on a semiconductor substrate, an insulation film having an opening section where an opening is formed, forming a first resist on the insulation film while avoiding the opening section and the semiconductor substrate exposed via the opening section, forming a first metal on the opening section, the semiconductor substrate exposed via the opening section, and the first resist by a vapor deposition method or a sputtering method, removing, by a lift-off method, the first resist and the first metal on the first resist, forming, on the insulation film, a second resist allowing the first metal to be exposed, causing the first metal to grow a second metal by an electroless plating method, and removing the second resist, where these processings are included in the listed order.

Semiconductor device manufacturing method

A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.

Method for manufacturing substrate for semiconductor device

Substrate for semiconductor device and method of manufacturing the same

A surface mount high-frequency circuit is configured such that a plurality of ground padsand a plurality of external connection ground conductorsare discretely disposed to surround a signal line padand an external connection signal line conductorand a plurality of interlayer connection ground conductorsand that a plurality of columnar ground conductorsare discretely disposed to surround an interlayer connection signal line conductorThus, it is possible to suppress radiation of an unnecessary signal to the outside using a simple production process that is completed by only a wafer process without separately preparing a component such as a shield cover case.

Growing community of inventors

Tokyo, Japan

Kohei Nishiguchi