Semiconductor Components Industries, LLC

Interuniversitair Microelektronica Centrum (imec)

Ami Semiconductor, Inc.

Koen Reynders

Peter Moens

Vincent De Heyn

Mahmud Zubeidat

A circuit for protecting a semiconductor from electrostatic discharge events includes a Zener diode () in series with a resistor () between a power line HV VDD and a ground fine HV VSS. A gate of a DMOS device () is connected to a node between the diode and the resistor. The drain and source of the DMOS are connected between the power lines. During an ESD event, the gate voltage of the DMOS increases and the ESD current will be discharged through the DMOS to ground. When the current exceeds the capacity of the channel of the DMOS, a parasitic bipolar transistor or transistors associated with the DMOS device acts in a controlled snapback to discharge the current to ground. The use of a vertical DMOS (VDMOS) instead of a lateral DMOS (LDMOS), can reduce the area of the device and improve the protection.

Hybrid ESD clamp

An electrostatic discharge (ESD) protection circuit for the protection of an electronic circuit from an ESD event. The electronic circuit, in operation, is provided with a supply voltage and a reference voltage (typically electrical ground) via voltage terminals and/or power supply buses. The protection circuit includes two bipolar transistors in series, where the transistors are coupled between the supply voltage terminal/bus and the reference voltage terminal/bus. The bases of the transistors are coupled via a connection including two resistors in series, where the connection point between the two resistors is coupled with the connection point between the two transistors.

Growing community of inventors

Oudenaarde, Belgium

Koen Reynders