Licentia Patent-Verwaltungs Gmbh

Telefunken Electronic Gmbh

Klaus Worner

Erich Kasper

Ulf Konig

Hans J Herzog

The invention relates to a method in particular for manufacturing bipolar transistors. By applying selective epitaxy methods and by using self-adjusting techniques, the process sequence is shortened and the transistor properties are improved.

Method for manufacturing bipolar transistor by selective epitaxial

A structured semiconductor body e.g., an integrated circuit or a transistor, based on an silicon substrate having barrier regions which contain polycrystalline silicon, preferably produced by a silicon MBE process. The barrier regions are required to delimit monocrystalline silicon semiconductor regions and/or structures to prevent undesirable current flow.

Structured semiconductor body

A structured semiconductor body based on a Si substrate and having monocrystalline semiconductor regions and barrier regions which contain polycrystalline silicon which have preferably been produced in an Si-MBE process. The barrier regions are provided to delimit the monocrystalline Si semiconductor structures to prevent undesired current flow, for example between two monocrystalline devices of an integrated circuit. The polycrystalline silicon of the barrier regions has a substantially lower electrical conductivity than the monocrystalline regions, and consequently it is possible to spatially selectively dope portions the barrier region so as to provide regions which electrically contact a monocrystalline silicon region. In a preferred embodiment a polycrystalline silicon region within the barrier region is doped so that it forms a pn-junction with the adjacent monocrystalline semiconductor region and can be used, for example, as an emitter zone of a bipolar device.

Method of making a semiconductor device

A structured semiconductor body based on a Si substrate and having monocrystalline semiconductor regions and barrier regions which contain polycrystalline silicon which have preferably been produced in an Si-MBE process. The barrier regions are provided to delimit the monocrystalline Si semiconductor structures to prevent undesired current flow, for example between twso monocrystalline devices of an integrated circuit. The polycrystalline silicon of the barrier regions has a substantially lower electrical conductivity than the monocrystalline regions, and consequently it is possible to spatially selectively dope portions the barrier region so as to provide regions which electrically contact a monocrystalline silicon region. In a preferred embodiment a polycrystalline silicon region within the barrier region is doped so that it forms a pn-junction with the adjacent monocrystalline semiconductor region and can be used, for example, as an emitter zone of a bipolar device.

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Leingarten, Germany

Klaus Worner