Infineon Technologies Ag

Qimonda Ag

Rising Silicon, Inc.

Klaus Ufert

Cay-Uwe Pinnow

A sputter deposition apparatus and method, and a substrate holder for use with a sputter deposition apparatus is disclosed. According to one embodiment of the invention, a sputter deposition apparatus is provided, including at least one sputter target, a first plasma, a substrate holder, and a further plasma. In one embodiment, the further plasma is an ECWR plasma. According to an additional embodiment of the invention, an anode is provided between the further plasma, and the substrate holder. According to a further embodiment, the substrate holder includes a dielectric layer with varying thickness.

Sputter deposition method for forming integrated circuit

An integrated circuit including a resistive memory element and a method of manufacturing the integrated circuit are described. The method of manufacturing the integrated circuit includes depositing a switching layer material and intentionally forming inhomogeneously distributed defects within the switching layer material to increase a number of switching cycles of the resistive memory element. The resistive memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state. The switching layer contains intentionally formed defects that increase the number of switching cycles of the switching layer.

Increased switching cycle resistive memory element

The present invention relates to a reproducible conditioning during the manufacturing of a resistively switching CBRAM memory cell comprising a first electrode and a second electrode with an active material positioned therebetween. The active material is adapted to be placed in a more or less electroconductive state by means of electrochemical switching processes. A CBRAM memory cell manufactured pursuant to the method according to the invention has, due to the improved conditioning, more reliable and more distinctly evaluable electrical switching properties. Moreover, no more forming step is necessary with the method according to the present invention.

Resistively switching memory

Disclosed is a non-volatile memory cell including a first conductive electrode region, a second conductive electrode region and a memory region disposed therebetween. The memory region includes one or a plurality of metal oxide nanoparticles, which contact and electrically connect the first and the second electrode region via contact locations and which exhibit a bistable resistance properties when applying an external voltage.

Non-volatile, resistive memory cell based on metal oxide nanoparticles, process for manufacturing the same and memory cell arrangement of the same

A memory cell for opto-electronic applications includes a substrate, a first electrode and a second electrode, and an active layer arranged between the first and the second electrodes, wherein the active layer includes a metalloporphyrin derivative, and wherein the second electrode is transparent and includes ZnO, which is doped with B, Al, Ga, or Mg.

Growing community of inventors

Unterschleissheim, Germany

Klaus Ufert