U.S. Philips Corporation

Other

Klaus G Kroner

Jorg Wolber

Hartmut S Harlos

Matthias Peters

Wilhelmus A Zwijsen

A circuit arrangement for processing an input video signal (V) is described, which video signal has a fixed black level (SP), a given white peak value (WW) as well as a black peak value (SW) dependent on the picture contents (during tb), in which a correct display of the blackest and brightest parts of the picture contents of the video signal (V) is rendered possible without many components and without interference. To this end the circuit arrangement includes

Contrast and brightness control whereby both are based on the detected

A multiplying digital-to-analog converter which includes an R-2R chain network is characterized in that, for partial or complete potential equalization, the chain network for an n-bit-wide digital signal applied to the converter comprises (n+m) connection points, where n,m are natural integers greater than zero, the connection point (n+m) produces the output signal of the converter. A first current mirror is provided which produces a constant first current that can be switched to the individual connection points (1+m) to (n+m). The least significant bit of the digital signal is allocated to the connection point (1+m) and the most significant bit to the connection point (n+m) and the first current is switched only to those connection points whose allocated bit has a first state. A second current mirror is provided which produces a constant second current that is larger than that of the first current mirror and can be switched to the individual connection points 1 to n, while the least significant bit is allocated to the connection point 1 and the most significant bit to the connection point n, the second current is switched only to those connection points whose allocated bit has a second state.

Multiplying digital-to-analog converter

A circuit for the compensation of a control current of a first transistor whose main current path is arranged in series with a main current path of a second transistor between two supply voltage terminals. The arrangement includes a current mirror circuit including two transistors having a common terminal connected to the one supply voltage terminal which is coupled to the second transistor. The input terminal of the current mirror is connected to a control terminal of the second transistor and its output terminal is arranged to supply a compensation current to a control terminal of the first transistor. The circuit provides an optimum compensation for the control current of the transistor amplifier (first transistor) and even in the case of low supply voltages produces a maximal signal output swing of the first transistor by the provision of a third transistor via whose main current path the compensation current is supplied and whose control terminal is connected to a node between the main current paths of the first transistor and the second transistor.

Circuit arrangement for the compensation of the control current of a

A circuit arrangement for amplifying a periodic signal and for adjusting a reference level contained therein, in which a charging/discharging arrangement alternately supplies charging or discharging currents to a storage means, depending on whether the value of a periodic signal exceeds or is exceeded by a limit value, such that a mean value at least substantially corresponding to the reference level occurs at the storage means includes a compensator means which adjusts the charging and disharging currents by a compensation factor which is selected such that the ratio of the charging current to the discharging current is independent of fluctuations in current resulting from variations affecting the gain factors of amplifier components comprised in the amplifier means.

Circuit arrangement for adjusting a reference level in a periodic signal

A circuit arrangement for deriving an output current from an input current, which output current is limited to a current range which is bounded by at least one limit value. It is possible to limit high-frequency currents by avoiding current distributions or saturation effects in that the circuit arrangement comprises a current combination element (1) for forming an at least substantially linear combination of the input current (IE), the output current (IA) and a fixed reference current (IR) and by at least a rectifier circuit (2) arranged in the current path of the input current (IE) and/or the output current (IA).

Circuit arrangement for generating a limited current

The invention relates to a quartz oscillator comprising two transistors to whose base terminals the collector voltage of each one of the other transistors is applied, a two-terminal network incorporating a quartz resonator being connected to the emitter of one of the transistors. The collector voltage is applied to the corresponding base via a semiconductor junction. The oscillator further includes respective emitter and collector impedances for the transistors in which the product of the emitter impedances is greater than the product of the collector impedances. When the supply voltage is sufficiently low so that the collector-base diodes of the transistors are always in the non-conducting state, the oscillator frequency is independent, to a very large degree, of saturation phenomena of the two transistors. When manufactured in integrated circuit form, only one additional exterior terminal is required for the connection of a quartz resonator.

Integrable transistor oscillator requiring only one pin to quartz

In magnetic video-tape equipment of the helical-scan type the vertical synchronizing information is situated at the beginning of a track near the edge of the magnetic tape. When the edge portion of the magnetic tape does not cooperate correctly with the head in the case of a faulty magnetic tape or apparatus, the vertical synchronizing information is not scanned and the resulting picture will roll in a vertical direction. However, since the beginning of a track coincides with the edges of the head-change signal, the vertical synchronizing information, in accordance with the invention, is always derived from the head-change signal, i.e. even during normal undisturbed operation, and is added to the CVBS signal, the signal scanned from the magnetic tape being blocked during this time. For this purpose the edge of the head-change signal is delayed and this delay is controlled so that normally the generation of the vertical synchronizing information from the line-pulse signals which are synchronized with the preceding track starts halfway between two such line-pulse signals or their active edges. Also when the permissible phase shift to the head change signal relative to the line-pulse signal upon each head change is taken into account the vertical synchronizing information always starts an equal number of half-line periods after the beginning of a track, thereby precluding a vertical picture jump, not even by half a line period.

Circuit arrangement for generating the vertical synchronizing

Field synchronizing circuit arrangement for a television device, in a television receiver or a video magnetic tape reproduction, a frequency divider circuit coupled to the line oscillator producing a field control signal defined by the standard in the absence of an incoming synchronizing signal (indirect synchronization), the frequency divider circuit being rest when said incoming synchronizing signal is present again.

Circuit arrangement for the control of the vertical deflection

A container for holding in an orderly assembly objects such as writing instruments, tools, cigarettes and other similar objects, has a pair of substantially identically shaped covers provided with opposed peripheral rims, a cover pivoting means adjacent each pair of opposing rims of said covers to mount the covers pivotally together onto a receptacle to form said container to fold or close and to unfold or open. The rims have a combined depth at least equal to the width of the receptacle to accommodate it in the closed position of the covers. The container has at least one pivotable receptacle for holding at least one of said objects, said receptacle having part of said pivoting means and a bottom surface adjoining said pivoting means, said receptacle being mounted between the rims of the said covers to said pivoting means. On opening the container the receptacle is automatically erected and exposed for ease of handling of the articles and visual inspection.

Foldable container with at least one receptacle for elongated articles

A switch for a varicap tuner has a differential amplifier. A feedback circuit comprising a current mirror and a feedback amplifier ensures equal current flow in the difference amplifier transistors, and thereby ensures temperature compensation.

Circuit arrangement for switching a tuning voltage with low switch

A great limitation of the tolerance in the touch sensitivity is obtained by a special touch control arrangement.

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Hamburg, Germany

Klaus G Kroner