Infineon Technologies Ag

Siemens Aktiengesellschaft

Qimonda Ag

Klaus Aufinger

Herbert Knapp

Josef Boeck

Rudolf Lachner

Thomas Happ

Thomas Nirschl

Markus Zeiler

A method includes providing a first semiconductor chip comprising a ring-shaped metal structure extending along a contour of a first main surface of the semiconductor chip. The method includes encapsulating the first semiconductor chip with an encapsulation body thereby defining a second main surface and depositing a metal layer over the first semiconductor chip and the encapsulation body. A plurality of external contact pads are placed over the second main surface of the encapsulation body, the metal layer electrically coupling at least one external contact pad of the plurality of external contact pads to the ring-shaped metal structure. A seal ring is placed between the ring-shaped metal structure and the contour of the first main surface of the first semiconductor chip.

Method of forming a ring-shaped metal structure

A device includes a semiconductor chip with a ring-shaped metal structure extending along the contour of a first main surface of the semiconductor chip. An encapsulation body encapsulates the semiconductor chip and defines a second main surface. An array of external contact pads attaches to the second main surface of the encapsulation body, and at least one external contact pad of the array of external contact pads electrically couples to the ring-shaped metal structure.

Device including a ring-shaped metal structure and method

A memory includes a first bipolar transistor, a first bit line, and a first resistive memory element coupled between a collector of the first bipolar transistor and the first bit line. The memory includes a second bit line, a second resistive memory element coupled between an emitter of the first bipolar transistor and the second bit line, and a word line coupled to a base of the first bipolar transistor.

Resistive memory including bipolar transistor access devices

A bipolar transistor is provided in which the product of base-collector capacitance and collector resistance can be reduced through a layout optimization, which leads to an improvement of the critical transistor parameters. The bipolar transistor has an emitter formed from a plurality of emitter elements, a plurality of base contacts and a plurality of collector contacts, these elements being provided in a specific arrangement with respect to one another for the formation of the transistor layout. The invention provides for the emitter to have at least one closed emitter configuration, the at least one emitter configuration bounding at least one emitter inner space, which can in turn be divided into a plurality of partial spaces. At least one of the base contacts is arranged in the emitter inner space, while at least one other base contact and the collector contacts are arranged outside the emitter configuration.

Bipolar transistor

A structure for a microwave device in which the minimum noise figure is reduced in that underneath the base terminal surface of a transistor, a highly-doped trenched layer is formed, which layer is connected to a reference potential in the vicinity of the base terminal surface via a standard collector contact.

Growing community of inventors

Ottobrunn, Germany

Klaus Aufinger