Mitsubishi Denki Kabushiki Kaisha

Kiyotoshi Ueda

Kazuhiro Nishimura

An IC measuring method including positioning a plurality of ICS, each having a plurality of circuit blocks performing different functions, selecting different circuit blocks in each of the plurality of ICs, measuring the test results from each of the selected circuit blocks, and selecting a different circuit block in each of the plurality of ICs for the next measurement. The circuit block selection is controlled by a matrix circuit or by physically shifting the positions of the ICs.

IC measuring method

A semiconductor integrated circuit device includes individual circuit blocks which are tested according to the method of the invention. Circuit blocks of a semiconductor integrated circuit device may be tested independently of one another until all circuit blocks have been tested, or alternatively may be simultaneously tested. The multi-test method of the invention simultaneously tests plural semiconductor integrated circuit devices by successively testing corresponding circuit blocks on each semiconductor integrated circuit device. The test apparatus of the present invention is of minimal size and complexity, and greatly enhances testability of a semiconductor integrated circuit device.

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Itami, Japan

Kiyotoshi Ueda