Rohm Co., Ltd.

Kiyoto Ito

Tadashi Shibata

Makoto Ogawa

SRAMs A, B, C, and D having pixel data of each small block of each large block, for example a small block Afor the SRAM A, to simultaneously read out a plurality of pixel data in the small block by specifying an address assigned to each small block, and a matrix of coefficient in which a matrix of plural coefficients are arranged are provided. Also provided are a coefficient matrix controllerand an adding sectionto multiply the plural coefficients respectively by pixel data corresponding to each thereof and obtain a sum of the multiplied results. Each pixel data of each small block forming one large block, the pixel data being read out from the SRAMs A, B, C, and D, are multiplied by the coefficient matrix rearranged into a predetermined order.

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Chiba, Japan

Kiyoto Ito