Kioxia Corporation

Kiyotaro Itagaki

Kazuaki Kawaguchi

Dongxu Li

According to one embodiment, a semiconductor integrated circuit includes a first signal line including a first part and a second part, a second signal line including a third part and a fourth part, a first inverter, a second inverter, and a control circuit. A first signal is input to the first part in a first period. A second signal is input to the third part in a second period. The first inverter outputs, to the second part, a first inverted signal obtained such that a logic of the first signal is inverted. The second inverter outputs, to the fourth part, a second inverted signal obtained such that a logic of the second signal is inverted. The control circuit brings the second signal line into a floating state in the first period, and brings the first signal line into a floating state in the second period.

Semiconductor integrated circuit

According to one embodiment, a memory system includes a plurality of memory packages, on-die termination (ODT) circuits, and a controller. The plurality of memory packages are coupled by a common bus and arranged in groups, each group includes a pair of memory packages facing each other, and each memory package includes a plurality of memory chips. The ODT circuits are respectively disposed in the memory packages. The ODT circuits are on/off controlled based on an asserted state of a chip enable signal CEn acquired using a periodic signal of at least two cycles.

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Naka Kanagawa, Japan

Kiyotaro Itagaki