Toshiba Memory Corporation

Kioxia Corporation

Kiyotaka Hayashi

Shinya Takeda

Shunsuke Kodera

Yoshio Furuyama

Tetsuya Iwata

Kenichirou Kada

Wangying Lin

Kyoko Shoji

A memory system includes a nonvolatile memory and a serial peripheral interface (SPI) controller communicable with an external controller external to the memory system in accordance with an SPI standard, a first terminal through which the SPI controller receives a command, and a second terminal. The SPI controller is configured to operate in one of a plurality of operational modes in accordance with the command received through the first terminal. The operational modes include a first mode in which a signal received through the second terminal is used as a control signal to perform a predetermined function and a second mode in which the signal is not used as the control signal to perform the predetermined function.

Memory system and control method based on quad-serial peripheral interface (SPI) controller with external memory system based on SPI standard

A memory system includes a controller that recognizes, as a command, a signal received immediately after a chip select signal is received from a host device, and a memory that includes a plurality of blocks. When the command is a first command, the controller outputs to the host device, information indicating whether at least one of a write operation and an erase operation with respect to at least one particular block is prohibited.

Memory system storing block protection information

Growing community of inventors

Kawasaki Kanagawa, Japan

Kiyotaka Hayashi