Fujitsu Corporation

Fujitsu Microelectronics Limited

Fujitsu Semiconductor Limited

Meiji University

Routrek Networks, Inc.

Kiyoshi Ozawa

Takashi Suzuki

Hideki Kitada

Yumiko Koura

Yoshiaki Sakamoto

Fumitoshi Sugimoto

Hisatsugu Shirai

Hironao Tokitsu

Shinichi Sasaki

Hiroshi Taketazu

Shunrokuro Fujiwara

Eiji Kita

A fertigation system comprises: a controller that transmits sensor data to a fertigation control server, and that controls a water supply valve, a culture stock solution supply valve, and a discharge valve on the basis of received data; and a fertigation control server that, on the basis of the sensor data received from the controller, calculates control amounts for the water supply valve, the culture stock solution supply valve, and the discharge valve, and returns the control amounts to the controller.

Fertigation system, fertigation control server, salts accumulation determination method, and soil EC sensor

(a) A copper alloy film containing at least two types of metal elements in addition to copper is formed on the surface of an insulator containing oxygen and formed on a semiconductor substrate. (b) A metal film made of pure copper or copper alloy is formed on the copper alloy film. (c) After the step (a) or (b), heat treatment is performed under the condition that a metal oxide film is formed on a surface of the insulator through reaction between the oxygen in the insulator and the metal elements in the copper alloy film.

Manufacture method for semiconductor device having improved copper diffusion preventive function of plugs and wirings made of copper or copper alloy and semiconductor device of this kind

A semiconductor device having a multilayer wiring structure and a manufacturing method thereof are provided. A semiconductor device and a manufacturing method thereof are provided in which the reliability and the manufacturing yield are high and the design constraint is small. Wirings are formed on a substrate. Low dielectric constant films are formed around the wirings. Reinforcement insulating films are formed in a dielectric material of a larger elastic modulus than that of a formation material of the low dielectric constant films and are arranged to overlap with the wirings when viewed perpendicularly to a substrate surface. Reinforcement insulating films are arranged to intersect with the wirings.

Semiconductor device and manufacturing method thereof

A semiconductor device according to the present invention includes an active region having a MOS transistor and a groove surrounding the periphery of the active region, in which the groove is filled with a combination of a first material that produces a tensile strain in the active region and a second material that produces a compressive strain. Thereby, the foregoing object is achieved.

Semiconductor device with tensile strain and compressive strain

An exposure method executed after processing a hole in a substrate of a semiconductor device, has an exposure step of transferring a pattern on a mask onto an upper layer of the hole and forming a wiring groove by exposure, wherein a quantity of exposure with which a wiring groovejust above the hole or the wiring groove in the vicinity of the hole is exposed to light, is greater than a quantity of exposure with which a wiring grooveA in a position spaced away from just above the hole is exposed to the light.

Exposure method for upper layer of hole of semiconductor device

Manufacture method for semiconductor device having improved copper diffusion preventive function of plugs and wirings made of copper or copper alloy

A reticle manufacturing method comprises a step of retreating side surfaces of a lift-off pattern to reduce an area of a wide pattern portion, a step of forming a wide convex pattern and a narrow convex pattern by etching a glass substrate (transparent substrate) while using a second mask pattern as a mask, a step of reducing an area of a first wide mask portion, a step of reducing at least an area of a second wide mask portion smaller than an area of the first wide mask portion, and a step of reducing an area of a wide light shielding portion by etching the wide light shielding portion while using the first wide mask portion as a mask.

Etching method for making a reticle

A plurality of pixel areas are defined on the surface of a substrate. A partition wall is disposed on the surface of the substrate in an area between adjacent pixel areas. The partition wall comprises a lower portion made of inorganic insulating material and an upper portion made of insulating material having etching characteristics different from the etching characteristics of the lower portion and disposed on the lower portion. The upper portion protrudes from the side walls of the lower portion toward the pixel areas. Lower electrodes are formed on the pixel areas. Organic layers are disposed on the lower electrodes and contains organic luminescence material which emits light upon current injection. Upper electrodes are disposed on the organic layers.

Growing community of inventors

Kawasaki, Japan

Kiyoshi Ozawa