Hitachi, Ltd.

Kiyoshi Hisano

Akira Kurano

Toshio Nakano

Masafumi Nozawa

Akihito Ogino

Akira Yamamoto

Hiroyuki Kitajima

Hiroyuki Kurosawa

Shuji Sugimoto

Toru Nishigaki

Akihiko Togawa

Ken Hirashima

Kenji Kubota

Michio Miyazaki

Yoshiro Shiroyanagi

Masayuki Hoshino

Yoshiro Shiroyana

A buffer memory capable of storing contents of a plurality of tracks of a disk volume is provided in a disk controller or a disk drive, and in dump processing requested by a higher rank unit (CPU) to the disk controller, the data is immediately transferred from the buffer memory if the data to be dumped is present in the buffer memory, and if the data to be dumped is not present in the buffer memory, dump prefetching into the buffer memory is started and the execution of the dump processing is interrupted so that an on-line input/output operation other than the dump processing is accepted. When the dump prefetching into the buffer memory is over, the interrupted dump processing is resumed.

On-line dumping system and disk sub-system

On-line dumping system and disk sub system

A disk unit control apparatus (DKC) comprises a cache memory provided between a CPU and an external memory (DKU) storing the information exchanged with the CPU, the cache memory holding temporarily copies of the information stored in the DKU. A request from the CPU for access to the information stored in the DKU is met as far as possible by use of the information held in the cache memory. First transfer routes of information between the CPU and the cache memory is greater in number than second transfer routes of information between the cache memory and the DKU. This makes it possible that even when direct accesses to the DKU in the same number as the second transfer routes occur in each of the first transfer route, accesses to the cache memory which may arise from other CPUs are capable of being effected through the remaining ones of the first transfer routes. As a result, a cache memory accessible with high speed is obtained, and the utilization efficiency of the data stored in the cache memory is substantially improved, improving the data throughput between the CPU and the DKU.

External memory control techniques with multiprocessors improving the

When a positioning operation of a head on a track of a disk including a target record is completed, information is read out from the track of the disk and stored in a buffer memory without waiting a read command from a host side controller. A transfer operation of the target record of the information from the buffer memory to the controller is performed when the controller is not busy and generates the read command. A transfer rate of the record from the buffer memory to the controller is made faster than a read rate of the information from a disk or a write rate into the buffer memory, so that a nominal transfer rate of an entire system is increased without changing the read or write rate.

Information transfer control system having rotary storage unit which

A disk unit control apparatus (DKC) comprises a cache memory provided between a CPU and an external memory (DKU) storing the information exchanged with the CPU, the cache memory holding temporarily copies of the information stored in the DKU. A request from the CPU for access to the information stored in the DKU is met as far as possible by use of the information held in the cache memory. First transfer routes of information between the CPU and the cache memory is greater in number than second transfer routes of information between the cache memory and the DKU. This makes it possible that even when direct accesses to the DKU in the same number as the second transfer routes occur in each of the first transfer route, acesses to the cache memory which may arise from other CPUs are capable of being effected through the remaining ones of the first transfer routes. As a result, a cache memory accessible with high speed is obtained, and the utilization efficiency of the data stored in the cache memory is substantially improved, improving the data throughput between the CPU and the DKU.

Disk unit with processors which detect cache status and control port

In a data processing system having a first external memory, a second external memory, and a control memory for storing information on data renewals in the first external memory, a system and a method provide for back-up operations in parallel with ordinary data processing, including dump processing in which renewed data parts in the first external memory are copied as backup data into the second external memory with reference to the contents of the control memory. The method provides the step of storing into the control memory first identifier information for identifying areas of the first external memory where data items were renewed; the step of storing into the control memory second identifier information for identifying areas of the first external memory where data items were renewed during the dump processing; and the step of erasing at completion of the dump processing the first identifier information items except those which identify the same areas as identified by the second identifier information items. Thus, ordinary job processing and the renewals of the data items of the first external memory can be performed even in the course of the data dumping processing.

Backup control method and system in data processing system using

A computer system having a disk cache unit between a disk unit and the main storage unit. Ordinarily, the data transfer processing is carried out between the disk unit and the disk cache unit and between the disk cache unit and the main storage unit in this case. The present invention is characterized by enabling these two data transfer operations to be executed in parallel and to prevent a director from becoming the bottleneck of the processing due to the concentrated processing requests. For this purpose, the present invention provides for conducting a data transfer between the disk cache unit and a disk unit while a data transfer is taking place between the main storage unit and the disk cache unit. The director is configured, for example, with two data transfer controlling systems and two data transfer units for carrying out data transfer according to instructions for the two data transfer controlling systems.

Parallel transfer type director means

The present invention relates to a computer system having a disk cache unit between a disk unit and the main storage unit. Ordinarily, the data transfer processing is carried out between the disk unit and the disk cache unit and between the disk cache unit and the main storage unit in this case under control of a director. The present invention is characterized by enabling these two data transfer operations to be executed in parallel and to prevent the director from becoming the bottleneck of the processing due to the concentrated processing requests. For this purpose, the present invention provides for a data transfer between the disk cache unit and a disk unit while a data transfer is taking place between the main storage unit and the disk cache unit.

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Odawara, Japan

Kiyoshi Hisano