Boe Technology Group Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Beijing Boe Optoelectronics Technology Co., Ltd.

Kiyong Kim

Jian Nan Guo

Liping Luo

Chaoqin Xu

Tao Wang

Weifeng Zhou

Xing Ming

Zengbiao Sun

Wei Wang

Jeong Hun Rhee

Haichen Hu

Huishuang Liu

Xiangnan Yun

Guangming Lu

Ziqing Zhou

Embodiments of the present disclosure disclose a thin film transistor, a fabrication method thereof, a repair method thereof, and an array substrate. The thin film transistor comprises a gate electrode (), a gate insulating layer (), an active layer (), a source electrode () and a drain electrode (). The source electrode () comprises a first source electrode portion () and a second source electrode portion () independent from each other, the first source electrode portion () and the second source electrode portion () are electrically connected with the active layer (), respectively; and/or, the drain electrode () comprises a first drain electrode portion () and a second drain electrode portion () independent from each other, the first drain electrode portion () and the second drain electrode portion () are electrically connected with the active layer (), respectively.

Thin film transistor, fabrication method thereof, repair method thereof and array substrate

A mask, including a transparent substrate and mask patterns formed on a surface of the transparent substrate, wherein the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area; both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area; each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.

Mask, manufacturing method thereof and exposure system

An embodiment of the present invention discloses a mask. The mask comprises: a substrate; a light transmission area on the substrate; a light shielding area on the substrate, provided with at least two light shielding layers, each of the at least two light shielding layers having a preset mask pattern and being conductive; and one or more connecting wire(s), configured to respectively electrically connect the at least two light shielding layers.

Mask

The invention relates to the technical field of an alignment method, and discloses a method for aligning substrate and mask, including: firstly forming at least one set of alignment marks on a mask plate; selecting a certain number of large-size substrates as sample substrates; forming a plurality of sets of alignment marks on each sample substrate using the mask plate and the at least one set of alignment marks formed thereon to divide the sample substrate into a plurality of sub-substrate areas; and then performing mask process on the respective sample substrates, accurate alignment for each sub-substrate area can be realized by means of the plurality of sets of alignment marks on the sample substrate, and one sub-substrate area can be accurately aligned by means of at least two sets of alignment marks formed on the sample substrate. In the alignment, positions of the plurality of sets of alignment marks formed on the sample substrate are recorded and stored, and mask process on a non-sample substrate is performed based on parameters relating to the stored positions of the plurality of sets of alignment marks, thus the seaming degree between patterns in the same layer and the coincidence degree between patterns in different layers on the non-sample substrate are guaranteed, so that mass production for large-size substrates with good quality can be realized. The invention also discloses a method for preparing semiconductor device.

Method for aligning substrate and mask and method for preparing semiconductor device

A method of manufacturing a color filter substrate, performed by: preparing a color mask including a cyan transparent layer, a fuchsine transparent layer and a yellow transparent layer; preparing a color sensitive material substrate including a red sensitive emulsion cyan layer, a green sensitive emulsion fuchsine layer and a blue sensitive emulsion yellow layer; exposing the color sensitive material substrate using the color mask; and performing processes of development, bleaching, fixation and stabilization on the color sensitive material substrate.

Color filter substrate and manufacturing method thereof

Provided are a thin film transistor liquid crystal array substrate and a method of manufacturing the same. The thin film transistor liquid crystal display array substrate includes: a substrate, a gate scanning line and a signal scanning line formed on the substrate and intersecting each other, an insulating layer and an active layer formed between the gate scanning line and the signal scanning line, wherein an air gap is formed between the insulating layer and the active layer at the intersection of the gate scanning line and the signal scanning line.

TFT LCD array substrate wherein an air gap is formed between the insulating layer and the active layer and method of manufacturing thereof

Disclosed is a light guide plate, comprising a light guide plate body and a plurality of micro mirrors formed on an upper surface of the light guide plate body for controlling a reflection direction of light incident on the light guide plate. The amount of light output from a backlight module using the light guide plate can be controlled by adjusting an angle of each of the micro mirrors with respect to an incident light from a light source.

Growing community of inventors

Beijing, China

Kiyong Kim