Panasonic Corporation

The Circle for the Promotion of Science and Engineering

Kiyomichi Araki

Noriaki Saito

Katsuaki Abe

Yoshifumi Hosokawa

Yohei Morishita

Kentaro Miyano

Tadashi Morita

Yoshito Shimizu

Hitoshi Ishida

Takao Nakagawa

Masaki Kanemaru

Hiroka Shiozaki

Takafumi Nasu

The discrete time analog circuit () is provided with: a rotate capacitor circuit (); an amplifier () that is connected to the input line or the output line of the rotate capacitor (), and amplifies the input potential or input charge; a coefficient circuit () that is positioned in series with the amplifier (), and has two history capacitors (--) positioned parallel to each other; a first active capacitor among the two history capacitors (--) that is connected to and charges the amplifier (); and a clock generation circuit () that is connected to the input line or the output line without the involvement of the amplifier (), and that sequentially changes the pairing of the rotate capacitor circuit () a second active capacitor, which shares a charge with the rotate capacitor circuit ().

Discrete time analog circuit and receiver using same

Disclosed is a wireless receiving apparatus, whereby inter-antenna interference can be reduced without inducing an increase of a mounting area due to an increase of the number of antennas, and the number of RFIC input terminals, circuit scale and power consumption can be reduced. In the wireless receiving apparatus (), when a receiving antenna (-) and a down-converter () are connected with a multiplexer () therebetween, a capacity control unit (-) controls the capacity value of the capacity-variable parasitic element (-) connected to the receiving antenna (-) such that the communication capacity of the receiving antenna (-) is maximum. Furthermore, when the receiving antenna (-) and the down-converter () are connected with the multiplexer () therebetween, the capacity control unit (-) controls the capacity value of the capacity-variable parasitic element (-) connected to the receiving antenna (-) such that the communication capacity of the receiving antenna (-) is maximum.

Wireless receiving apparatus

Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Harmonic rejection mixer

A direct sampling circuit and a receiver which carry out discrete time analog processing with a high degree of design freedom and are provided with a filter property which is achievable to comply with the receipt of a broad band signal. A plurality of discrete time analog processing circuits () are connected in parallel with each other, a gm value and a capacitance of a capacitor in each circuit system are set independently based on a prescribed condition, and an output signal obtained from each circuit system is synthesized by means of a buffer capacitor (), so that an equivalently high-dimensional IIR filter can be put into practice.

Discrete time direct sampling circuit and receiver

The sampling filter apparatusincludes the first sampling switch, the second sampling switch, the first integratorfor integrating the charge input from the first sampling switch, the second integratorfor integrating the charge input from the second sampling switch, a plurality of integrators connected to both of the first integrator and the second integrator via a charging switch, respectively, the control section, a plurality of charging switches, and a plurality of discharge switches. A charge input from the sampling switch, a charge accumulated in the capacitorand a charge accumulated in a capacitorare shared by the capacitor, the capacitorand the capacitor, and the charge accumulated in the capacitoris output.

Sampling filter apparatus

In order to provide a band pass filter for high wavelength which has a wideband, small insertion loss and flat passband and obtains steep attenuation, a plurality of ring filters, in which, an input terminal of a high-frequency signal is provided to an arbitrary point on a line in a microstripline ring resonator having the line with one wavelength at electrical length, an output terminal is provided to a point positioned at a half wavelength at electrical length from the input terminal, a open stub of &#xbc; wavelength at electrical length (or &#xbd; wavelength short stub) is connected to a point positioned at &#xbc; wavelength at electrical length from the input terminal, are connected by cascade connection with attenuation pole frequencies being different.

Growing community of inventors

Saitama, Japan

Kiyomichi Araki