Matsushita Electric Industrial Co., Ltd.

Kiyokazu Hashimoto

Masafumi Shimotashiro

Kenichi Honjo

Makoto Gotou

Haruo Isaka

Kei Ichikawa

Eiji Yamauchi

Yoshio Higashida

Takashi Inoue

Yasumori Hino

Masakazu Nishino

Eiji Ueda

Akihiro Takeuchi

Shiro Kato

Yoshio Sakakibara

Takao Kashiro

Toshihiko Maruoka

Iwao Hidaka

Masafumi Sato

Hideki Ohyama

Yoshiki Yamamoto

Masato Izawa

Kouiti Hayashi

Koichi Hayashi

Hidemi Oka

Tomoo Nakagawa

Keizi Hayashi

There are provided a balance adjustment circuit () for adjusting levels of first and second detection signals from a tracking detector, a differential circuit () for generating a difference signal between the adjusted first and second detection signals, an AD conversion circuit () for digitizing the difference signal, a wobble signal detection circuit () for detecting a wobble signal from the digitized difference signal, an adder circuit () for generating a sum signal of the adjusted first and second detection signals, a binarization circuit () for converting the sum signal into a binarized signal, a latch circuit () for latching the binarized signal and converting the same into a timing signal, a control signal generation circuit () for generating a control signal based on the timing signal and the digitized difference signal, a residual component removal circuit () for removing a residual signal component included in the digitized difference signal based on the control signal and outputting a LPP detection signal, and an address detection circuit () for detecting address information from the LPP detection signal. The wobble signal and the LPP signal are detected reliably with a simple configuration.

Optical disc apparatus

A tracking error signal detector includes: a photodetector ( ) for detecting reflected light from an optical recording medium having a servo area provided with a first wobble mark and a second wobble mark; an amplifier ( ) for producing a summation signal of the reflected light; a sampling portion ( ) for sampling the summation signal; a first arithmetic portion ( ) for calculating an extremum of the summation signal in the vicinity of reproduction timing for each of the first and second wobble marks from the sampling values so as to produce first and second extremums; and a second arithmetic portion ( ) for producing a tracking error signal that corresponds to a difference between the first and second extremum. The tracking error signal detector can produce a high-accuracy tracking error signal even if sampling is performed with an asynchronous clock relative to the summation signal.

Tracking error signal detector

A playback clock extracting device having: a quantization member for quantizing, at a sampling clock rate having a rate twice a recording rate, a signal played back from a recording medium so as to output sample data, a digital equalizer for subjecting the sample data to digital equalization so as to alternately output playback data and PLL data at an interval of one sampling clock, cycle a ternary decision member for making a ternary decision as to whether the playback data is positive, zero or negative. The playback clock extracting device further having arithmetic unit for calculating a sampling phase error in the quantization member by multiplying a result of the decision of the ternary decision member by a difference between two successive data values of the PLL data outputted immediately prior to and immediately after the playback data for the decision of the ternary decision member, respectively, a sampling clock generating member which controls a phase and an oscillation frequency on the basis of the sampling phase error outputted by the arithmetic unit so as to generate the sampling clock, and a playback clock generating member which divides a frequency of the sampling clock by two so as to generate a playback clock for detecting the playback data.

Playback clock extracting apparatus

An encoder generating an analogue color signal is configured by a digital circuit. An external frame signal supplied from an external apparatus is counted by a clock pulse signal generated by a crystal oscillator, and a synchronizing signal to be added to the luminance signal is produced on the basis of a counted results, and all horizontal synchronizing periods of digital active lines are made identical, and in vertical blanking period, a predetermined horizontal synchronizing period is made variable.

Apparatus for producing a video signal in synchronism with an external

A magnetic recording and reproducing apparatus includes: a recorder for recording information signals so as to form tracks obliquely on a magnetic tape, and for recording pilot signals so that the frequency may differ between different modes such as SP and LP; a reproducing head for reproducing recorded information; an error detecting circuit for comparing the level difference of pilot signals recorded in both tracks adjacent to the track to be scanned by there producing head and for outputting a tracking error signal; and a controller for controlling the feed of the magnetic tape so that the tracking error signal may be balanced. Preferably, in the LP mode, a pilot signal of a higher frequency than that used in the SP mode is recorded. In a tracking error detector for a magnetic recording and reproducing apparatus for detecting the pilot signal, the reproduced signals are sampled at a frequency at a common multiple of each pilot frequency, a pilot signal is detected, and a tracking error signal is output.

Tracking error detector with comparison of amplitude detected pilot

The digital processing apparatus includes a high speed response PLL that produces a first clock signal locked on the horizontal synchronization signal included in the video signal input thereto. An analog to digital converter converts the input video signal with respect to the first clock signal into a digitized video signal. A write controller controls a video memory to store the digitized video signal based on the first clock signal. A low speed response PLL produces a second clock signal based on the vertical synchronization signal included in the video signal. A read controller controls the video memory to read out the stored digitized video signal therefrom based on the second control signal. The digital processing apparatus can store and read the digitized video signal to and from the video memory stably, enabling the video signal read from the video memory to be processed effectively and securely.

Digital processing apparatus using two synchronization signals

A timing recovering apparatus comprises an equalizer for equalizing a digital data signal subjected to interleaved NRZI such that the digital data signal has partial response (1, 0, -1), two comparators for comparing the equalized data signal with two different reference levels, two phase comparing portions for detecting phase difference between the outputs of the comparators and a reproduced clock signal separately, an adder for summing the outputs of the phase comparators, and a VCO for generating the reproduce clock signal in accordance with the output of the adder. This timing recovering apparatus performs phase comparing with two different phase comparators and PLL control is performed on the sum of the outputs of the two different phase comparators, so that the clock signal is not affected by data pattern of the data signal. An automatic slice apparatus comprises the equalizer for equalizing a digital data signal subjected to interleaved NRZI, and two comparators supplied with reference levels, and the timing recovering apparatus, detects amplitude of the output of the equalizer in response to the reproduced clock signal to compensate the reference levels.

Timing recovering apparatus having window periods determined by period

A delay circuit is provided with an npn type of transistor of which a base is connected to an input terminal, a first constant current source through which a constant current flows from an emitter of the transistor to ground, a first capacitor arranged between the emitter of the transistor and an electric source terminal, a second capacitor C.sub.22 arranged between a collector of the transistor and an output terminal, a first resistor arranged between the emitter of the transistor and the output terminal, a second resistor arranged between the collector of the transistor and the electric source terminal. The constant current of the constant current source is changeable, and an emitter resistance of the transistor is changed depending on the constant current. Therefore, an analog signal applied to the input terminal is changeably delayed by coaction of the resistors, the capacitors and the emitter resistance adjusted by changing the constant current of the constant current source.

Delay circuit for changeably delaying an analog signal

A tracking error detecting circuit in which tracking error detecting pilot signals having different frequencies are added to a main signal every track and recorded onto a magnetic recording medium, and upon reproduction, reproduction output levels of the pilot signals reproduced as crosstalks from both of adjacent tracks are compared, and a tracking error is detected. n signals having the same frequencies as those of the pilot signals and whose phases are different are generated and multiplied to the reproduction signal. Unnecessary components are eliminated by n LPFs (Lowpass filters). The amplitude values of the reproduced pilot signals are vector separated and detected. Further, the vector separated amplitude values are vector synthesized and detected. Therefore, by multiplying the signals having the same frequencies as those of the pilot signals, the synchronous detection is performed. The influence due to the undetected pilot phases is solved by detecting by performing the vector separation and synthesis. Therefore, the amplitude values can be certainly detected by the synchronous detection. The signal to noise ratio of the reproduction pilot signals can be determined by the LPFs (lowpass filters). Even in the case of a bad transmission signal to noise ratio of the reproduction pilot signals which could not be coped by the conventional construction, the amplitude values can be certainly detected.

Tracking error detection circuit of magnetic recording and reproduction

A non-linear signal processing apparatus used in a video tape recorder or a video disk player is disclosed. The time variation of an input signal or a processed version thereof is non-linearly processed by a differential circuit and a closed loop including a non-linear circuit. The non-linearly processed time variation of the signal or a processed version thereof is arithmetically combined with the input signal. Thus, the same non-linear characteristic as that obtained by the prior art analog signal technique is attained by the digital signal processing technique, which is superior in integrity and stability. By appropriately selecting the characteristic of the non-linear circuit, better results than those obtainable by the analog signal processing technique are achieved.

Non-linear signal processing apparatus

In a chrominance signal processing apparatus for processing a sampled and digitized signal, when a first carrier chrominance signal is frequency-converted to a second carrier chrominance signal whose carrier angular frequency is a second reference angular frequency by use of a frequency converting signal, the present invention provides an arrangement such that: a variation component of a carrier signal frequency from a first reference angular frequency signal which the first carrier chrominance signal has, namely, an angular frequency difference signal is derived by an APC circuit from the first and second reference angular frequency signals, angular frequency difference signal, and further various kinds of angular frequency signals and phase signals which give necessary functions and performances as a chrominance signal processing circuit are added or subtracted in the states of the angular frequency signals and phase signals thereby simplifying the process for obtaining the above frequency converting signal; and thereby reducing the number of circuit elements and the scale in case of realizing this by a digital circuit. In addition, the invention enables the frequency variation which the first carrier chrominance signal has to be eliminated in a wide frequency range due to its performance, thereby making it possible to perform accurate frequency conversion.

Chrominance signal processing apparatus

A dropout compensation system used with a video tape recorder, video disc, etc. is disclosed. In conventional modulation systems, a reproduced signal which has been modulated in a modulation system in which the signal information is determined by the zero passage of the carrier, is delayed in the form of the modulated signal, and if a dropout occurs, the reproduced signal is switched to the delayed signal by a first switch thereby to compensate for the dropout. The phase of the modulated signal becomes discontinuous each time the switch is operated, thus causing an offensive spark-like interference upon demodulation. The invention is intended for reducing these noises and comprises a second demodulator for normally demodulating the delayed signal and a second switch operated at a different timing from the first switch in response to the dropout. The noise is extracted by the operation of the second switch and the extracted noise is cancelled by being combined at opposite polarity with the demodulated reproduced signal, which signal contains the noise but has been compensated for the dropout. A noise-removing circuit utilizing the horizontal correlation of the TV signal may be easily added to the configuration of the present invention.

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Matsubara, Japan

Kiyokazu Hashimoto