Panasonic Intellectual Property Corporation of America

Panasonic Corporation

Godo Kaisha IP Bridge 1

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Tagivan Ii LLC

Panasonic Intellectual Property

Intellectual Property Corporation of America

Panasonac Corporation

Kiyofumi Abe

Takahiro Nishi

Tadamasa Toma

Shinya Kadono Kadono

Satoshi Kondo

Makoto Hagai

Ryuichi Kanoh

Chong Soon Lim

Han Boon Teo

Hai Wei Sun

Jing Ya Li

Yusuke Kato

Ru Ling Liao

Sughosh Pavan Shashidhar

Chu Tong Wang

Che Wei Kuo

Hideyuki Ohgose

Takashi Hashimoto

Virginie Drugeon

Che-Wei Kuo

Hiroshi Arakawa

Kazuhito Kimura

Masato Ohkawa

Hideo Saitou

Koji Arimura

Sheng Mei Shen

Teck Wee Foo

Tatsuro Juri

Kazuma Sakakibara

Yuki Maruyama

Masayasu Iguchi

Hiroaki Toida

Luca Rigazio

Shinji Kitamura

Masayoshi Tojima

Toshihiko Kusakabe

Alec Hodgkinson

Hiroshi Ikeda

Syouzou Fujii

Shinjiro Mizuno

Youji Shibahara

Viktor Wahadaniah

Takeshi Tanaka

Takashi Sugimoto

Naoki Yoshimatsu

Rohith Mars

Katsuki Urano

Nobuhiko Hashida

Makoto Adachi

Risa Ishihara

An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.

Encoder, decoder, encoding method, and decoding method

An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.

An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.

Image encoding and decoding with a blending operation between partitions in a block

A reproduction apparatus includes circuitry and memory coupled to the circuitry. In operation, the circuitry: obtains a first segment including first subpictures corresponding to points of time and a second segment including second subpictures corresponding to the points of time; combines the first subpictures and the second subpictures to generate access units corresponding to the points of time; and reproduces the access units generated.

Reproduction apparatus, transmission apparatus, reproduction method, and transmission method

An encoder includes memory, and circuitry accessible to the memory. The circuitry accessible to the memory: determines whether OBMC is applicable to generation of a prediction image of a current block, according to whether BIO is to be applied to the generation of the prediction image of the current block; when BIO is to be applied to the generation of the prediction image of the current block, determines that OBMC is not applicable to the generation of the prediction image of the current block, and applies BIO to the generation of the prediction image of the current block without applying OBMC.

A video image encoding device, in a first mode, variable-length-encodes a residual coefficient to generate a coefficient code string, outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string, in a second mode, directly uses a differential image as a coefficient code string without variable-length-encoding the differential image, and outputs the coefficient code string and the header information in a state in which the header information is associated with the coefficient code string.

Device and method of video encoding with first and second encoding code

An encoder, includes: memory; and circuitry coupled to the memory, in which in a first encoding process, the circuitry quantizes a current block using a first quantization matrix in both of a first case where the circuitry performs primary transform and the circuitry does not perform secondary transform and a second case where the circuitry performs both the primary transform and the secondary transform, in a second encoding process, the circuitry quantizes the current block using a second quantization matrix in a third case where the circuitry performs primary transform and the circuitry does not perform secondary transform, and in a third encoding process, the circuitry quantizes the current block without using a quantization matrix in both of a fourth case where both the primary transform and the secondary transform are skipped and a fifth case where both the primary transform and the secondary transform are performed.

An encoder: generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and generates a final prediction image of the current block by applying an update process to the first prediction image. Candidates for the update process include a first process and a second process. The first process is a BDOF process. The second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block. In the applying of the update process, the first process and the second process are mutually exclusively applied.

An encoder that includes memory and circuitry coupled to the memory. The circuitry encodes a slice into one or more data access regions in a variable length encoding process. The circuitry encodes one or more offsets into a slice header, based on a flag written into a sequence header and a total number of the one or more data access regions. The one or more offsets each specify a head position of a corresponding one of the one or more data access regions in a bitstream. When the flag indicates that the one or more offsets are to be encoded and the total number is at least two, the one or more offsets are encoded. The flag switches between encoding and not encoding the one or more offsets regardless of whether the total number is at least two.

An encoder including circuitry and memory coupled to the circuitry. In both of a first case where an orthogonal transform is performed and a second case where the orthogonal transform is skipped, when a number of CABAC processes is within an allowable range, the circuitry: encodes a plurality of coefficient information flags by CABAC; and encodes a remainder value of the coefficient; and when the number of CABAC processes is not within the allowable range, the circuitry: skips the encoding of the plurality of coefficient information flags, wherein in the first case, the circuitry: converts the coefficient to a second coefficient by using a poszero value that is determined using a plurality of surrounding coefficients; and encodes a value of the second coefficient, and wherein in the second case, the circuitry: encodes the value of the coefficient.

An encoder includes memory and circuitry coupled to the memory. The circuitry stores a total number of temporal sub-layers in a bitstream Into either a picture timing supplemental enhancement information (SEI) message or a buffering period SEI message, and encodes the total number of the temporal sub-layers.

An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.

Image encoder and related non-transitory computer readable medium for image decoding

An encoder including circuitry and memory coupled to the circuitry. In a second type of residual coding among a first type of residual coding where an orthogonal transform is applied to a current block and the second type of residual coding where the orthogonal transform is skipped for the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding, the circuitry: in a first loop process, derives a context index by using at least one of a plurality of surrounding coefficients; and encodes a plurality of coefficient information flags by CABAC with the derived context index; and in a second loop process of the plurality of loop processes, encodes a plurality of absolute value flags by CABAC with another context index.

Encoder for encoding a plurality of coefficient information flags and encoding a plurality of absolute value flags

An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.

Encoder for encoding information of sub-bitstreams having mutually different frame rates

An encoder that switches whether or not to store a first parameter included in hypothetical reference decoder (HRD) parameters related to a decoding unit into a buffering period supplemental enhancement information (SEI) message according to a second flag stored into the buffering period SEI message. The second flag indicates whether or not the HRD parameters related to the decoding unit are present, and a value of the second flag being equal to a value of a first flag stored in a sequence parameter set. The first flag indicates whether or not the HRD parameters are present.

Encoder that switches whether or not to store a first parameter into a buffering period supplemental enhancement information message according to a flag

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Osaka, Japan

Kiyofumi Abe