Samsung Electronics Co., Ltd.

Kiwhan Song

Sangyong Yoon

Kihwan Choi

Sang-Hyun Joo

Kyungryun Kim

Ju Seok Lee

Il Han Park

Hyung Suk Kim

Yongsung Cho

Sukkang Sung

Boh-Chang Kim

Gyosoo Choo

Tae-Hong Kwon

Hai-Seok Park

The present disclosure provides serial-gate transistors and nonvolatile memory devices including serial-gate transistors. In some embodiments, a nonvolatile memory device includes a plurality of memory blocks, a plurality of pass transistor blocks, and a plurality of gates sequentially arranged in a horizontal direction in a gate region above a semiconductor substrate. Each of the plurality of pass transistor blocks includes a plurality of serial-gate transistors configured to transfer a plurality of driving signals to a corresponding memory block of the plurality of memory blocks. Each of the plurality of serial-gate transistors includes a first source-drain region, a gate region, and a second source-drain region that are sequentially arranged in a horizontal direction at a semiconductor substrate. The plurality of gates are electrically decoupled from each other. A plurality of block selection signals respectively applied to the plurality of gates are controlled independently of each other.

Serial-gate transistor and nonvolatile memory device including the same

Various example embodiments provide a flash memory device, comprising a cell string; a page buffer connected to the cell string and a bit line and configured to sense data stored in a selected memory cell by precharging a sensing node connected to the bit line; and a voltage regulator. The page buffer comprises a latch including first and second inverters coupled between a latch node and an inverted latch node; and a pull-down NMOS transistor for tripping the sensing result of the selected memory cell to the latch node. The voltage regulator adjusts a trip voltage by providing the source voltage to the pull-down NMOS transistor. The flash memory device reduce a trip voltage variation range by using only the pull-down NMOS transistor characteristics. Also, an OFF cell margin and an ON cell margin may be secured by adjusting the level of the trip voltage using the source voltage.

Flash memory device for adjusting trip voltage using voltage regulator and sensing method thereof

A nonvolatile memory system includes a nonvolatile memory device including a plurality of memory cells, and a memory controller. The memory controller is configured to count a clock to generate a current time, program dummy data at predetermined memory cells among the plurality of memory cells at a power-off state, detect a charge loss of the predetermined memory cells when a power-on state occurs after the power-off state, and restore the current time based on the detected charge loss.

Nonvolatile memory system including nonvolatile memory device and memory controller and operating method of memory controller

An operating method of a memory controller controlling a nonvolatile memory device including a plurality of pages includes receiving a read request and a logical address from an additional device; determining a program state of an upper unselected word line of a selected word line corresponding to the received logical address; and transmitting a physical address corresponding to the logical address, state information, and a read command to the nonvolatile memory device according to a result of the determination in response to the read request, wherein the state information indicates a level of a first unselect read voltage the nonvolatile memory device is to apply to the upper unselected word line.

Operating method of nonvolatile memory device and operating method of memory controller controlling the nonvolatile memory device

A soft-decision read method of a nonvolatile memory device includes receiving a soft-decision read command, applying a read voltage to a selected word line, pre-charging bit lines respectively connected to selected memory cells of the selected word line, continuously sensing states of the selected memory cells. The pre-charged voltages of the bit lines and the read voltage supplied to the selected word line are not varied during the sensing states of the selected memory cells.

Method of reading memory cells with different threshold voltages without variation of word line voltage and nonvolatile memory device using the same

A method of programming a nonvolatile memory device comprises determining a temperature condition of the nonvolatile memory device, determining a program pulse period according to the temperature condition, supplying a program voltage to a selected word line using the program pulse period, and supplying a pass voltage to unselected word lines while supplying the program voltage to the selected word line.

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Seoul, South Korea

Kiwhan Song