Samsung Electronics Co., Ltd.

Kiseok Bae

Jinsu Hyun

Kitak Kim

Ji-su Kang

Jonghoon Shin

Kyoungmoon Ahn

Sungcheol Park

Woohyun Son

Jieun Ahn

A system on chip includes a one-time programmable (OTP) memory configured to store secure data, an OTP controller including at least one shadow register configured to read the secure data from the OTP memory and to store the secure data, a power management unit configured to receive an operation mode signal from an external device and to output test mode information indicating whether an operation mode is a test mode according to the operation mode signal and a test valid signal corresponding to the secure data, and a test circuit configured to receive the test mode information from the power management unit, to receive test data from the external device, and to output a scan mode signal and a test mode signal according to the test data and a test deactivation signal, wherein the test deactivation signal corresponds to development state data indicating a chip development state in the secure data.

System on chip for performing scan test and method of designing the same

Provided is an integrated circuit. The integrated circuit includes a plurality of clock generators configured to respectively generate a plurality of clock signals, a plurality of logic circuits configured to operate in synchronization with the plurality of clock signals, and controller circuitry configured to identify meta-stability information based on frequencies of the plurality of clock signals, and configured to control at least one clock generator so that at least one of the plurality of clock signals is randomly delayed in response to the meta-stability information.

Integrated circuit and operating method thereof

A method for patching a patchable function programmed in a read only memory (ROM) of a semiconductor device by using firmware loaded onto a first memory includes receiving an encrypted and digitally signed firmware image; generating a verification result by verifying the firmware image by using a public key; decrypting the firmware image by using a secret key depending on the verification result; loading firmware decrypted from the firmware image onto the first memory; and running a replacement function corresponding to an identifier of the patchable function included in the firmware, when the patchable function is called.

Semiconductor device including secure patchable ROM and patch method thereof

An authentication apparatus, included in a device supporting a network communication, includes a certificate handler that receives a certificate of an opponent and parses or verifies the certificate of the opponent. Cryptographic primitives receive an authentication request of the opponent, generate a random number in response to the authentication request, generate a challenge corresponding to the random number, and verify a response of the opponent corresponding to the challenge. A shared memory stores the parsed certificate, the random number, the challenge, and the response. An authentication controller controls the certificate handler, the cryptographic primitives, and the shared memory through a register setting, according to an authentication protocol.

Growing community of inventors

Hwaseong-si, South Korea

Kiseok Bae