Delco Electronics Corporation

Aptiv Technologies Limited

Gm Global Technolgoy Operations, Inc.

Delphi Technologies, Inc.

Kirk A Bailey

Dan Darryl Carman

Douglas A Srail

Scott L Linke

Kevin W Kaster

Robert Charles Simon, Jr

Everett R Lumpkin

Jill Gosma Hersberger

Charles M Grimm

Dennis D Thompson

Dale W Deutscher

A method of verifying audio notifications generated within a vehicle includes generating an audio notification using an audio generation path that includes at least a controller, an audio notification generator and a speaker, wherein the controller generates an audio notification request utilized by the audio notification generator to generate an audio signal, and wherein the speaker converts the audio signal into the audio notification. The method further includes monitoring sounds within the vehicle using a microphone separate from the audio generation path and analyzing the monitored sounds using an audio analyzer, wherein the audio analyzer verifies whether the audio notification was generated. Feedback is provided to the audio generation path regarding whether generation of the audio notification was verified.

System and method for verifying audible and/or visual notifications

System and method for veryifying audible and/or visual notifications

Binary files in an executable file system can be directly executed by the central processing unit at the location in which the binary files are stored. A pre-runtime tool can traverse a replica directory hierarchy in a host/loading computer to fill an internal data structure which can be used to generate a binary file that can be loaded directly into the embedded computer. The central processing unit (CPU) and its components such as the address bus, data bus, and program counter, can directly interact with unit of storage interface mechanisms, such as read/write means, identifying location means, and concatenation means. In some embodiments, the page size in the memory management unit (MMU) of the CPU is set to the same size as the unit of storage.

Executable file system for an embedded computer

The present invention relates to a method and apparatus for verifying the correct performance of software on an electrical system by use of a cycle-based simulator. More specifically, it relates to an apparatus and method for simulating an electrical interconnection between two electronic subsystems, or modules, within a cycle based simulator. Two separate devices, a hardware output's driver and a hardware input's receiver, are characterized as one type of simulated object, a node, and the interconnection between the two devices as a second type of simulated object, a wire. The activity of output nodes is limited to placing signal values on the wire. Input nodes have a characteristic behavior in response to the information from output nodes. The wire is enhanced by storage and comparison functions that allow the comparison between new and current values of output signals as well as identification of the cycle associated with a particular change.

Method for modeling electrical interconnections in a cycle based

A communication method provides for an exchange of a multiple byte message between two processors. Interrupt suppression associated with the message transfer is minimized by alternating the processors between master and slave operating modes with each byte exchanged.

Interprocessor communication method

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Westfield, IN, United States of America

Kirk A Bailey