Samsung Electronics Co., Ltd.

Kiran Kolar Chandrasekharan

Sehwan Lee

Saptarsi Das

Ankur Deshwal

Pramod Parameshwara Udupa

Arnab Roy

Sabitha Kusuma

Yeongon Cho

Gopinath Vasanth Mahale

Disclosed are a method of accessing a memory and an electronic device for performing the method. The electronic device includes a processor, and a memory electrically connected to the processor, wherein the processor may be configured to select a rank including bank groups of the memory, select a bank corresponding to a memory address to be accessed from among banks included in the selected rank, select a row and one or more columns from rows and columns of the selected bank corresponding to the memory address, and generate the memory address to access the memory based on an address mapping scheme according to the selected rank, the selected bank, the selected row, and the selected one or more columns.

Method and device of accessing memory with near memory accelerator

Disclosed is a hybrid traversal apparatus and method for a convolution neural network (CNN) accelerator architecture that receives input feature map (IFM) microbatches from a pixel memory and receiving kernel microbatches from a kernel memory, multiplies the IFM microbatches by the kernel microbatches while reusing the kernel microbatches based on a kernel reuse factor for at least one of a direct convolution (DConv) or a Winograd convolution (WgConv), to obtain output feature map (OFM) microbatches, and writes the generated OFM microbatches to the pixel memory, after quantization, non-linear function, and pooling on a result of the multiplying.

Power-efficient hybrid traversal apparatus and method for convolutional neural network accelerator architecture

A processor-implemented method for generating Output Feature Map (OFM) channels using a Convolutional Neural Network (CNN), include a plurality of kernels, includes generating at least one encoded Similar or Identical Inter-Kernel Weight (S/I-IKW) stream, converting, similar and identical weights in the at least one non-pivot kernel to zero to introduce sparsity into the at least one non-pivot kernel, broadcasting at least one value to the at least one non-pivot kernel, and generating at least one OFM channel by accumulating an at least one previous OFM value with any one or any combination of any two or more of a convolution of non-zero weights of the pivot kernel and pixels of the Input Feature Map (IFM), the at least one broadcasted value, and a convolution of non-zero weights of the at least one non-pivot kernel and pixels of the IFM.

Methods and systems with convolutional neural network (CNN) performance

A method for performing a pooling operation in bitwise manner, the method includes performing a pooling operation on ternary data upon receiving an input ternary vector, receiving an input binary vector, providing a fused hardware for performing the pooling operation on any of the received binary and the ternary data, and executing the pooling operation performed bitwise through the fused hardware.

Methods and systems with bitwise pooling operations

A method and an apparatus for processing layers in a neural network fetch Input Feature Map (IFM) tiles of an IFM tensor and kernel tiles of a kernel tensor, perform a convolutional operation on the IFM tiles and the kernel tiles by exploiting IFM sparsity and kernel sparsity, and generate a plurality of OFM tiles corresponding to the IFM tiles.

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Bengaluru, India

Kiran Kolar Chandrasekharan