Amazon Technologies, Inc.

Kiran Kalkunte Seshadri

Thomas A Volpe

Asif Khan

Nafea Bshara

Bijendra Singh

Sundeep Amirineni

Islam Mohamed Hatem Abdulfattah Mohamed Atta

Kari Ann O'Brien

Christopher Joseph Pettey

Robert Michael Johnson

Thomas Elmer

Steven Scott Larson

Carlos Javier Cabral

Kari Ann OBrien

Thomas Bradley Scholl

Alan Michael Judge

Jamie Plenderleith

Alaa Adel Mahdi Hayder

Prateek Tandon

Gianluca Grilli

Fnu Arun Kumar

Vasanta Kumar Palisetti

In one embodiment of the disclosure, packets are routed according to a VRF (Virtual Routing and Forwarding) domain that is represented by a VRF identifier in a VRF-identifier (ID) field of packet headers. In one embodiment of the disclosure, a VRF identifier may be added to a VRF-ID field of a packet header so that the packet is routed according to a VRF domain that the packet belongs to.

Extending virtual routing and forwarding

The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.

Logic repository service supporting adaptable host logic

Directional capacity of interfaces for networking devices are dynamically modified. Network traffic utilization of one direction of a network interface may be determined. A modification to a capacity of the networking device to process network traffic in the one direction of the network may be determined. The modification may then be applied to the networking device so that subsequent network traffic is processed according to the modified capacity in the one direction of the interface.

Dynamically configurable networking device interfaces for directional capacity modifications

Systems and methods are provided to enable parallelized multiply-accumulate operations in a systolic array. Each row of the systolic array can include multiple busses enabling independent transmission of inputs along the respective bus. Each processing element can include a plurality of interconnects to receive a plurality of inputs corresponding to the multiple busses. Each processing element of a given row-oriented bus can receive an input from a prior element of the given row-oriented bus at an active bus position and perform arithmetic operations on the input. Each processing element can further receive a plurality of inputs at passive bus positions and provide the plurality of inputs to subsequent processing elements without the plurality of inputs being processed by the processing element. Use of row-oriented busses can enable parallelization to increase speed or enable increased latency at individual processing elements.

Multiple busses within a systolic array processing element

Systems and methods are provided to enable parallelized multiply-accumulate operations in a systolic array. Each row of the systolic array can include multiple busses enabling independent transmission of inputs along the respective bus. Each processing element of a given row-oriented bus can receive an input from a prior element of the given row-oriented bus, and perform arithmetic operations on the input. Each processing element can generate an output partial sum based on the arithmetic operations, provide the input to a next processing element of the given row-oriented bus, without the input being processed by a processing element of the row located between the two processing elements that uses a different row-oriented bus. Use of row-oriented busses can enable parallelization to increase speed or enable increased latency at individual processing elements.

Multiple busses interleaved in a systolic array

Methods and hardware implementations for performing a motion search based on an estimated complexity of a block. The block is obtained from a first frame. A reference window is obtained from a second frame. For each partition type of N partition types, the block is partitioned into a plurality of partitioned blocks in accordance with the partition type. For each partitioned block of the plurality of partitioned blocks, a frequency transform of the partitioned block is computed, a complexity subvalue is computed for the partitioned block based on the frequency transform, and the complexity subvalue is accumulated into a complexity value for the partition type. M partition types are selected from the N partition types based on the N complexity values. A motion vector between the block and the reference window is determined for each partition type of the M partition types.

Complexity-based motion search for video encoder

Disclosed herein are techniques for preventing or minimizing completion timeout errors on a computer device. An apparatus include a processing logic circuit and a timeout logic. The timeout logic is configured to: generate a timeout event based on a transaction not completed by the processing logic circuit within a timeout period; determine a number of the timeout events generated during a monitoring period; and responsive to determining that the number equals to or exceeds a threshold, reduce the timeout period.

Adaptive timeout mechanism

Methods and hardware implementations for determining a motion vector between a first frame and a second frame. A block is obtained from the first frame. A reference window is obtained from the second frame. A set of lines are obtained from the block. The set of lines are delayed using a set of delay elements to produce a set of delayed lines. For each location of a search pattern comprising a plurality of locations arranged in a set of rows, a reference window line is obtained from the reference window, a block line is obtained from the set of delayed lines based on which row of the set of rows the location belongs to, and a similarity score of a plurality of similarity scores is accumulated based on the reference window line and the block line. A target location is identified by comparing the plurality of similarity scores.

Low-latency motion search for video encoder

Disclosed herein are techniques associated with a Direct Memory Access (DMA) engine that can include a data generation module. The DMA engine can receive, from a processing entity, a particular type of write command with an indicator to write a data pattern to an address. Upon receipt of the particular type of write command, the DMA engine can generate, using a data generation module of the DMA engine, the data pattern to be written to the address. The processing entity can be Central Processing Unit (CPU) including a core configured to process serial commands. The DMA engine can be disposed on a same die as a processing entity or a network interface port.

Pattern generation using a direct memory access engine

A multi-tenant environment is described with a configurable hardware logic platform (e.g., a Field Programmable Gate Array (FPGA)) positioned on a host server computer. The configurable hardware logic platform can be programmed with a host logic wrapper portion, which is controlled by a service provider, and a customer portion, which is programmed with logic provided by a tenant of the service provider. While the host logic wrapper portion is reprogrammed, protections are put in place to prevent a virtual machine or the customer logic from violating security built within the host logic wrapper portion. Such protections can be suspending communications between the virtual machine and the customer logic until the host logic wrapper is reprogrammed.

Secure reconfiguring programmable hardware with host logic comprising a static portion and a reconfigurable portion

Reference data is one type of data that the video accelerator may frequently be read from external memory. In various examples, the video accelerator can adaptively select inter-prediction modes based on the bandwidth to external memory that is available at any point in time. The video accelerator can determine the amount of bandwidth that is available, and when the bandwidth is insufficient for obtaining reference data for all possible inter-prediction modes, the video accelerator can use the encoding parameters of a neighboring block to select an inter-prediction mode to use. The video accelerator can then obtain a reference window for the selected inter-prediction mode, and perform prediction using the inter-prediction mode and the reference window.

Adaptive use of search modes based on neighboring blocks

Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include determining that the client configurable logic has performed an errant action.

Isolating unresponsive customer logic from a bus

Disclosed herein are techniques for configuring a shell logic in a configurable computing system while a client virtual machine (VM) using the shell logic is active. In certain embodiments, a configurable device includes a client configurable circuit associated with a client virtual machine, and a shell logic configured to isolate the client configurable circuit. The shell logic includes a reconfigurable shell, an isolation logic, and a packet processing logic. The isolation logic is configured to disable communication between the reconfigurable shell and the client virtual machine when the reconfigurable shell is being reconfigured. The packet processing logic is configured to service transactions between the client virtual machine and the configurable device after the communication between the reconfigurable shell and the client virtual machine is disabled. In some embodiments, the shell logic also includes a mailbox configured to enable communication between the client virtual machine and a management virtual machine.

Reconfiguring programmable hardware when a virtual machine is active

A computing system can include a server computer and a configurable hardware platform. The server computer can include instances or domains such as a management partition and a user partition. The management partition can be used to perform management services for the user partitions and the configurable hardware platform. The configurable hardware platform is coupled to the server computer, and can include a host logic and a configurable application logic. In an embodiment, the computing system is configured to provide the user partition with physical or virtual access to a first part of the configurable hardware platform through the host logic in the configurable hardware platform. The computing system is also configured to provide the user partition with virtual access to certain portions/resources associated with the configurable hardware platform.

Growing community of inventors

Cedar Park, TX, United States of America

Kiran Kalkunte Seshadri