Intel Corporation

Kip C Killpack

David W Grawrock

Bruce Querbach

Tieyu Zheng

Keshavan K Tiruvallur

Mark B Trobough

Chinna B Prudvi

Vui Yong Liew

Hermann Gartler

Ashok N Kabadi

Samie B Samaan

Keith A Drescher

Mukesh Kataria

Jay Joseph Nejedlo

Abhay A Dharmadhikari

Lyle E Cool

James J Grealish

Russell J Wunderlich

Brian Meyer

Abhijit Davare

Priyadarsan Patra

Ridvan A Sahan

William Penner

Rahima K Mohammed

Wee Hoo Cheah

Arun R Ramadorai

Kapila B Udawatta

Yuen Tat Lee

John L Baudrexl

Brandon Gavino

Christian E Iovin

Vinay Nooji

Loren James McConnell

Kyle Markley

Edwin E Parks

Padmakumar Gopal

Sanjay S Salem

David C Florey

Travis K Goff

David R Holman

Evan J Halprin

Katie R Hauser

Jiun Long Foo

Lauren M Lieu

Selvakumar Raja Gopal

Neil Dobler

Nagib Z Hakim

Timothy S Storey

Yi Amy Xia

An apparatus and method is described herein for providing a test, validation, and debug architecture. At a target or base level, hardware hooks (Design for Test or DFx) are designed into and integrated with silicon parts. A controller may provide abstracted access to such hooks, such as through an abstraction layer that abstracts low level details of the hardware DFx. In addition, the abstraction layer through an interface, such as APIs, provides services, routines, and data structures to higher-level software/presentation layers, which are able to collect test data for validation and debug of a unit/platform under test. Moreover, the architecture potentially provides tiered (multiple levels of) secure access to the test architecture. Additionally, physical access to the test architecture for a platform may be simplified through use of a unified, bi-directional test access port, while also potentially allowing remote access to perform remote test and debug of a part/platform under test. In essence, a complete test architecture stack is described herein for test, validation, and debug of electronic parts, devices, and platforms.

Test, validation, and debug architecture

A depth-sensing camera may be used to locate objects on a planar surface. A planar fit calculation is used to model the surface. One problem with the best planar fit calculation is that it is not robust over time. Firstly, this is because the depth data has a non-linear curve near its extremities because of camera lens distortion. Secondly, as the depth-sensing camera warms up and its thermal activity changes, the depth data drifts and the initial plane fit is no longer valid. The position and the amount of curvature and drift may be different for cameras of the same make and model in some cases. In accordance with some embodiments, algorithms may be used to detect and correct for these types of errors to support more robust plane fitting in real time.

Auto-correction of depth-sensing camera data for planar target surfaces

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Beaverton, OR, United States of America

Kip C Killpack