Apple Inc.

Appl Inc.

Kingsuk Brahma

Jie Won Ryu

Hyunwoo Nho

Jesse Aaron Richmond

Junhua Tan

Sun-il Chang

Hyunsoo Kim

Shengkui Gao

Shiping Shen

Hung Sheng Lin

Injae Hwang

Chaohao Wang

Yafei Bi

Myungjoon Choi

Wei Hsin Yao

Hopil Bae

Chin-Wei Lin

Mohammad Bagher Vahid Far

Rui Zhang

Alex H Pai

Derek Keith Shaeffer

Shinya Ono

Myung-Je Cho

Yun Yu Wang

Mohammad Ali Jangda

David A Stronks

Weijun Yao

Marc Joseph DeVincentis

Yue Jack Chu

Majid Gharghi

Graeme M Williams

Paolo Sacchetto

Baris Cagdaser

Taif Ahmed Syed

Yao Shi

Li-Xuan Chuo

Ting-Kuo Chang

Yingxuan Li

Sang Young Youn

Shingo Hatanaka

Yi Qiao

Manu Agarwal

Yunhui Hou

Christoph Horst Krah

Jean-Pierre Simon Guillou

Peter F Holland

Warren S Rieutort-Louis

Marc Albrecht

Qing Li

Erno H Klaassen

Arthur L Spence

Yifan Zhang

Chun Lu

Jenny Hu

Yuchi Che

Chengrui Le

Shatam Agarwal

Fan Gui

Hassan Edrees

Mohammad Reza Esmaeili Rad

Changki Min

Ce Zhang

Richard Hung Minh Dinh

Tsung-Ting Tsai

Giovanni Gozzini

Zhibing Ge

Mohammad Yeke Yazdandoost

Chieh-Wei Chen

Abbas Jamshidi Roudbari

Mahesh B Chappalli

Sandro Hermann Pintz

Cheng-Ho Yu

Christopher P Tann

Shih-Chyuan Fan Jiang

Shafiq M Jamal

ByoungSuk Kim

Wei Xiong

Shyuan Yang

Miguel C Christophy

Koorosh Aflatooni

Lu Zhang

Yang Xu

David S Zalatimo

Ilie Garbacea

Tobias Jung

Silvio Grespan

Keitaro Yamashita

Zino Lee

Rungrot Kitsomboonloha

Vehbi Calayir

Luigi Panseri

Gihoon Choo

Pei-En Chang

Haifeng Li

Sinan Alousi

Saman Saeedi

Chih-Wei Yeh

Wanqing Xin

Hyuck-Jae Lee

Ricardo A Peterson

To reduce overall power consumption for an electronic display power management integrated circuit (PMIC), one of multiple electric power converters and/or electric power regulators may be selected based on an electrical load (e.g., due to the total brightness of the content displayed) on the electronic display at a given moment. In some embodiments, the PMIC may include a less efficient heavy load converter designed with high-current handling capability and a more efficient light load (e.g., low current) converter with lower current handling capability. A controller may dynamically select between the converters depending on a present load or an expected load on the electronic display.

Content-aware dynamic power converter switching for power optimization

Systems and methods described herein may utilize a non-linear scaling relationship to scale brightness of selective portions of the display in a manner that reduces or eliminates perceivable banding effects. By non-linearly controlling changes in brightness of the display, a viewer may perceive a more uniform, linear dimming towards the relatively dimmer region without perceiving banding, leading to improved user experience when viewing the electronic display.

Display panel brightness control based on gaussian edges

In a display characterized by regions with different pixel responses due, for example, to local pixel density variation, voltage-to-luminance matching may be non-universal. Therefore, in order to avoid visual artifacts that may hinder a desired visualization of displayed content, it may be advantageous to compensate the different gamma responses. In some cases, such as with electronic devices having a single pixel density across the display, optical calibration may be performed to determine voltage-to-luminance matching. However, in electronic devices with local pixel density variations, it may be disadvantageous to perform optical calibrations for each region with a different pixel density. Instead of using two distinct gamma curves which may include dedicated optical calibration, a global nonlinear scaler (GNLS) compensation may be applied. Embodiments may pertain to techniques for applying a per-channel and band-global gamma-to-voltage compensation to reduce or minimize a relative luminance error amongst different responses of display regions.

Global nonlinear scaler for multiple pixel gamma response compensation

Embodiments herein provide various apparatuses and techniques to efficiently mitigate front-of-screen (FoS) artifacts that may occur due to voltage fluctuations due to alternating current (AC) or direct current (DC) mechanisms that may occur in a variety of pixel types. In one embodiment, emission profile awareness circuitry may be implemented to mitigate for FoS artifacts due to DC mechanisms. Two-dimensional (2D) digital compensation circuitry may address the DC portion of the voltage fluctuations by accounting for an emission profile applied to content displayed on an electronic display. In some embodiments, the 2D digital compensation circuitry may compensate for the AC portion of the voltage fluctuations by duplicating the AC voltage fluctuations via voltage error subtraction circuitry and voltage error accumulation circuitry.

Feedforward compensation of high-luminance banding Mura compensation

This disclosure provide various techniques for tracking emission profiles on an electronic display. An emission profile may be applied to the electronic display in order to illuminate certain pixels and deactivate (e.g., turn off) certain pixels in the electronic display to facilitate refreshing (e.g., programming with new image data) the deactivated pixels. A real-time row-based average pixel level or average pixel luminance calculation architecture may track the one or more EM profiles to accurately model EM profile behavior, which may enable accurate calculation of the average pixel level or average pixel luminance of the electronic display at any one point in time. The accurate average pixel level or average pixel luminance calculations effectuated by the EM profile tracking may be used to reduce the IR drop, improve real-time peak-luminance control, and improve the performance of under-display sensors, among other advantages.

Emission profile tracking for electronic displays

An electronic device includes a display and a sensor underneath the display. The display has a full pixel density region and a reduced pixel density region. Compared to pixels in the full pixel density region, pixels in the reduced pixel density region can be controlled using overdriven power supply voltages, overdriven scan control signals, different initialization and reset voltages, and can include capacitors and transistors with different physical and electrical characteristics. Gate drivers provide scan signals to pixels in the full pixel density region, whereas overdrive buffers provide overdrive scan signals to pixels in the reduced pixel density region. The pixels in the full pixel density region and the pixels in the reduced pixel density region can be controlled using different black level or gamma settings for each color channel and can be adjusted physically to match luminance, color, as well as to mitigate differences in temperature and aging impact.

Displays having reduced pixel density region with localized tuning

An electronic device may include processing circuitry configured to generate a first frame of image content and a second frame of image content. The second frame of image content is different from the first frame of image content. The electronic device may also include a display configured to display the first frame of image content at a first refresh rate. In response to receiving the second frame of image content, the electronic device may initially increase the refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

Frame insertion and frame rate sequencing for panel glitch prevention

An electronic device includes a display having multiple regions of pixels. Each pixel includes a diode that emits light based on an amount of current through the diode and a transistor that controls the amount of current flowing through the diode. The electronic device includes driver-integrated circuitry that reduces hysteresis in a first transistor of a first pixel of a region of pixels, settles a threshold voltage of the first transistor, applies a test voltage to the first transistor, and senses a current across the first transistor. The electronic device includes processing circuitry that determines a predetermined voltage based on the current and a predetermined current-voltage relationship determined at an initial temperature, determines a voltage difference between the test voltage and the predetermined voltage, and applies the predetermined voltage and the voltage difference to a second transistor of a second pixel of the region of pixels.

Systems and methods for external off-time pixel sensing

This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.

Systems and methods for clock frequency control during low display refresh rates in electronic devices

Systems and methods are described here to compensate for crosstalk (e.g., coupling distortions) that may be caused by a fanout overlaid or otherwise affecting signals transmitted within an active area of an electronic display. The systems and methods may be based on buffered previous image data. Technical effects associated with compensating for the crosstalk may include improved display of image frames since some image artifacts are mitigated and/or made unperceivable or eliminated.

Routing fanout coupling estimation and compensation

This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.

Two-dimensional content-adaptive compensation to mitigate display voltage drop

An electronic device may include an electronic display having multiple display pixels to display an image based on analog voltage signals. The electronic device may also include optical calibration circuitry to generate digital-to-analog converter (DAC) data based on image data associated with the image and dither circuitry to reduce a bit-depth of the DAC data, generating dithered DAC data. Additionally, the electronic device may include a gamma generator having one or more DACs to generate the analog voltage signals based on the dithered DAC data, which may instruct the gamma generator to generate the analog voltage signals indicative of the image data.

Dither enhancement of display gamma DAC systems and methods

Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.

Dynamic voltage tuning to mitigate visual artifacts on an electronic display

Systems, methods, and devices are provided for providing intra-frame luminance scaling to avoid drawing excessive power while still providing exceptional brightness. An instantaneous average pixel luminance of an electronic display may be determined. The instantaneous average pixel luminance may correspond to an amount of light currently being emitted by the electronic display due to a previous image frame and a current image frame. Based at least in part on the instantaneous average pixel luminance, the luminance of a subset of pixels of image data of the current image frame may be adjusted, thereby allowing the electronic display to operate at a relatively high brightness level without exceeding a power limit.

Peak luminance control to enable higher display brightness

External compensation of display panels may employ measurement or sensing circuitry configured to measure the output of a pixel and compensate for variations. Due to effects from the sensing circuitry, a mismatch between a target current and the actual current in the pixel may occur. Systems and methods that compensate for the effects from sensing circuitry and reduce or mitigate the mismatch are described. Systems and methods described herein include compensation circuitry that is capable of employing correction factors to compensate for the effects due to the presence of sensing circuitry. Methods for determining the correction factor are also described.

External compensation for displays using sensing and emission differences

Growing community of inventors

Mountain View, CA, United States of America

Kingsuk Brahma