Hycom Incorporated

Anderson Jacobson, Inc.

King Y Cheng

David M Motley

Naif D Salman

Richard W Middlestead

Arthur J Carlson

A 4800 bit-per-second full duplex modem is described which utilizes the full bandwidth of ordinarily available dial-up telephone circuits for transmission of data in both directions in different pass-band portions thereof. The two pass-bands overlap in about the middle of the telephone band in order to fully utilize that bandwidth for high speed data transmission. The overlap is less than that which will cause a greater error rate than desired from remote echos of transmitted data. Local echos, which are much stronger, resulting from the overlap bandwidth portion are cancelled by an echo cancelling technique. Local echo cancelling is accomplished at the baud rate, generated in each modem, for substraction from a received signal; a cancellation signal is generated from a time varying system that depends upon the modulating and demodulating carrier signals.

High speed dial-up telephone circuit full duplex data transmission

In a receiver, an analog-to-digital converter is adapted to sample a distorted analog signal to provide a plurality of distorted digital symbols separated in time by a particular interval. In an equalizer, taps are provided with variable multiplying coefficients which sequentially multiply the distorted digital symbols to provide undistorted digital symbols. A timing control network is responsive to variation in one of the multiplying coefficients to control the timing of the converter and hence the duration of the particular interval.

Timing recovery for an automatically equalized data modem

A data transmission system is provided with a double sideband suppressed carrier transmitter and receiver for transferring data between data processing apparatuses. The transmitter and receiver communicate over a telephone line which has physical characteristics which produce delay and attenuation distortion and phase jitter in the transmitted signal. The receiver includes a sampler for converting the transmitted signal into a digital signal, an automatic equalization network for correcting the delay and attenuation distortion, and a phase correction network compensating for frequency offset, phase offset, and phase jitter. The phase corrected and equalized signal is then detected and introduced to the data processing apparatus. An error signal calculator is responsive to the phase corrected signal and the detected signal to provide a system error signal for automatically updating the functions of the equalization and phase correction networks in accordance with the characteristics of the incoming signal. A timing control network which is also responsive to the system error signal, provides a timing error signal for correcting the sampling rate of the sampler. Filters in the transmitter and receiver provide the system with partial response signaling so the bandwidth of the system can be minimized, and even telephone lines of poor quality can accommodate a full duplex secondary channel for system control.

Digital data receiver with automatic timing recovery and control

In a system for transmitting information between first and second data processing apparatuses, a signaling scheme provides a digital data signal with in-phase components and quadrature components which define a plurality of vectors. The vectors, when plotted on a graph having an abscissa and an ordinate, each have a minimum separation distance defined by the radius of a circle having its center at the tip of the associated vector. The circles of the vectors, which are aligned in rows substantially parallel to the abscissa or the ordinate of the graph, are tangential to the adjacent circles. Boundary areas associated with the respective vectors are defined by boundary lines extensions of which pass through points defined by the vector components. This signaling scheme minimizes vector magnitude, associated with minimum power, while maximizing vector separation distance, associated with reduced detection error.

Data transmission system using optimal eight-vector signaling scheme

A demodulator for detecting first and second frequencies in an analog input signal includes a limiter providing first pulses having a short duration in response to the first frequency and having a long duration in response to the second frequency. A first counter provides a first reference signal including second pulses, and a second counter provides a second reference signal including third pulses. Logic means responsive to the second and third pulses provide a signal including fourth pulses during periods corresponding to the first frequency and a signal including fifth pulses during periods corresponding to the second frequency. An up-down counter is responsive to the fourth pulses to provide a first output signal and responsive to the fifth pulses to provide a second output signal. The fourth and fifth pulses have frequencies and durations providing the counter with substantially equal counting rates during the periods corresponding to the first and second frequencies of the analog signal.

Frequency shift key demodulator

A phase tracking network for correcting an undesirable first phase angle of a first signal, includes an error calculating circuit responsive to partial response data signals to provide a phase error signal. Filter means adapted to be coupled to the error calculating circuit is responsive to the linear and nonlinear characteristics of the phase error signal to provide a second phase angle in a second signal. A phase correction network coupled between the filter means and the error calculating circuit is responsive to the second phase angle in the second signal to correct the first phase angle in the first signal.

Phase tracking network

A receiver includes means for sampling and noncoherently demodulating a received signal to provide digital symbols in each of a first and second channel. An equalization network equalizes the incoming signal and a phase correction network corrects the phase of the equalized signal. In response to the transmission of a preamble in the first channel, a fast learn network derives the phase error by determining the arc tangent of a quotient formed by dividing the signal in the first channel by the signal in the second channel. A course phase jump can be made to insure that the arc tangent is not greater than unity. The timing error of the sampling means can be derived by determining the arc tangent of a quotient formed by dividing the present digital symbol in the one channel by the preceding digital symbol in the one channel. In response to an impulse in the preamble, the lead-in samples of an impulse response can be stored while the phase error is computed from the major sample; then the phase of the lead-in samples can be corrected. Equalization coefficients can be derived from the phase corrected impulse response samples. With this apparatus, in accordance with the preferred method of the present invention, the receiver can be adapted to receive normal data in less than thirty milliseconds.

Ultrafast adaptive digital modem

An automatic digital modem receiving an input analog signal samples the input signal to provide a random multilevel data signal. This multilevel signal is equalized and phase corrected so that the characteristics of the modem are substantially synchronized with the characteristics of the input analog signal. A system error signal which is responsive to the random multilevel data signal is averaged to provide a synchronization quality signal. When the synchronization quality signal degrades to a predetermined magnitude, a restart signal adjusts the sampling, the equalization, and the phase correction of the modem to reduce the magnitude of the synchronization quality signal. The associated method includes the steps of adjusting only the phase correction of the modem for a particular interval of time and then jumping the sampling of the modem if the synchronization quality signal has not been reduced below the first predetermined magnitude.

Apparatus and method for synchronizing a digital modem using a random

A transmitter transmits data through a communication channel to a receiver and the communication channel provides the data with delay and attenuation distortion. The receiver includes an equalization network having taps with multiplying coefficients for correcting the delay and attenuation distortion of the data. In response to a special sequence of the data, either specially generated by the transmitter or detected in random data, the receiver generates signals for updating the multiplying coefficients of the taps and these signals are introduced to the equalization network through a gate enabled by a special sequence detection network. This apparatus provides for the adjustment of the equalization taps in an extremely short period of time such as 5.83 milliseconds.

Fast equalization acquisition for automatic adaptive digital modem

An Automatic Gain Control responsive to an input analog signal having a significantly varying power level provides an output analog signal of substantially constant power level. An analog-to-digital converter samples the output analog signal and expresses the amplitude of the samples in digital words characterized by bits including a Most Significant Bit. The Automatic Gain Control is responsive to the digital characteristics of at least the Most Significant Bit of the digital words to amplify the output analog signal to the substantially constant power level. This permits amplification of the input signal to a level approaching the maximum level expressible by the digital words and significantly reduces the quantization noise of the converter by maximizing the number of digital words which are available to express the signal amplitude.

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Tustin, CA, United States of America

King Y Cheng