Fujitsu Corporation

Socionext Inc.

Kimitoshi Niratsuka

Kazuaki Oishi

Kunihiko Gotoh

Chikara Tsuchiya

Eiji Nishimori

Hirokazu Tanaka

Atsushi Yasunaka

Noriaki Shirai

Katsuya Shimomura

Katsuyoshi Otsu

An analysis unit analyzes a source code representing design data of a semiconductor device, and generates information (CDFG information) indicating the data and control flow of the semiconductor device. A high-level synthesis data generation unit acquires intermediate data (an object file), which is obtained by compiling the source code, generates intermediate data (an object file) by incorporating the CDFG information generated by the analysis unit into the acquired intermediate data, and outputs the generated intermediate data as high-level synthesis data.

High-level synthesis data generation apparatus, high-level synthesis apparatus, and high-level synthesis data generation method

In a PLL frequency synthesizer outputting signals with different frequencies: voltage-controlled oscillators output the signals and have the oscillation frequencies controlled according to control voltages; a first switch selects one of the signals; a frequency divider generates a frequency-divided signal of the selected signal by use of a changeable frequency-division ratio; a phase comparator generates the phase difference between the frequency-divided signal and a reference signal; a second switch selects one of paths connected to low-pass filters; each low-pass filter is provided for one of the voltage-controlled oscillators, has a changeable time constant, and converts the phase difference into one of the control voltages; and a controller cyclically controls the first and second switches and the frequency divider so that the voltage-controlled oscillators continuously output the signals, and changes the changeable time constant of each low-pass filter after all of the signals become stable.

PLL frequency synthesizer

A reduced-size bipolar supply voltage generator which produces a positive and negative voltages from a unipolar power source. A single inductor is employed for current switching operation, where electric energy supplied from a power source is stored in magnetic form, and the stored magnetic energy is released as electric energy. A first and second diodes are connected to first and second ends of the inductor, respectively. The inductor is grounded at the first end via a first switch, while its second end is connected to the power source via a second switch. A switching controller activates both switches to energize the inductor. It then deactivates the first switch alone, thus directing the inductor's energy to the positive voltage output through the first diode. The controller may turn off the second switch alone after energizing the inductor. The stored energy now appears at the negative voltage output through the second diode.

Bipolar supply voltage generator and semiconductor device for same

On a semiconductor device, fabricated are a VCOA, an frequency divider by integer R, a frequency divider by integer (P&#xd7;N+A)wherein each of P, N and A is an integer, A is variable and A&#x3c;N, a phase comparator, and a charge pump. A low pass filterhaving been confirmed to have standard characteristics is externally added to the semiconductor deviceto construct a PLL circuit to be tested. The frequency divideris of a pulse swallow type and has a control input for setting the integer A at ones in the vicinity of a value in normal use by user. The control input is connected to external terminals Dand Dof the semiconductor devicefor simplifying a test. The semiconductor deviceis judged whether it is acceptable or not in quality by checking whether or not the PLL circuit enters into a locked state within a given period in each cases of A=Aand A=A, where A&#x3c;A&#x3c;Aand Ais a value in normal use by user.

PLL semiconductor device with testability, and method and apparatus for testing same

On a semiconductor device , fabricated are a VCO A, an frequency divider by integer R , a frequency divider by integer (P&times;N&plus;A) wherein each of P, N and A is an integer, A is variable and A<N, a phase comparator , and a charge pump . A low pass filter having been confirmed to have standard characteristics is externally added to the semiconductor device to construct a PLL circuit to be tested. The frequency divider is of a pulse swallow type and has a control input for setting the integer A at ones in the vicinity of a value in normal use by user. The control input is connected to external terminals D and D of the semiconductor device for simplifying a test. The semiconductor device is judged whether it is acceptable or not in quality by checking whether or not the PLL circuit enters into a locked state within a given period in each cases of A&equals;A and A&equals;A , where A <A <A and A is a value in normal use by user.

A local oscillation circuit comprising a crystal oscillating circuit for generating an output voltage having a constant frequency, and an interface part for converting the output voltage from the crystal oscillating circuit into a current signal, the current signal being used as a local oscillation signal to be mixed with the receiving signal from an antenna, whereby a receiving circuit, which can be made as a single semiconductor chip consuming little current, can be realized.

Local oscillation circuit and a receiving circuit including the local oscillation circuit

A device for suppressing spurious signals generated by a fractional-N synthesizer. The fractional-N synthesizer generates an output frequency where an underlying PLL circuit uses a frequency divider for dividing the output frequency by a frequency-division ratio to obtain a comparison frequency and performs phase-comparison operations between a reference frequency and the comparison frequency to control the output frequency. The output frequency is changed by a frequency interval smaller than the reference frequency by making a temporal change to the frequency-division ratio once in every predetermined number of cycles. The device for suppressing spurious signals includes a current-generation unit which generates an electrical current proportional to a value representing an ordinal position of a current cycle in the every predetermined number of cycles, and a current-summation unit which adds the electrical current to another electric current controlling the output frequency in synchronism with the phase-comparison operations for a duration proportional to a cycle of the output frequency.

Suppressing channel-dependent spurious signals in fractional-N synthesizer

A fractional N-frequency synthesizer includes an accumulator outputting an output value, and a spurious signal cancel circuit. The spurious signal cancel circuit includes a pulse forming circuit, receiving a spurious signal cancelling reference signal, a reset signal and the output value of the accumulator, and outputting, in synchronism with the spurious signal cancelling reference signal, a pulse voltage signal having a pulse width proportional to the output value of the accumulator from a time when the reset signal is received, and a constant current circuit controlled by the pulse voltage signal and outputting an output current of the spurious signal cancel circuit.

Fractional N-frequency synthesizer and spurious signal cancel circuit

A power-supply control circuit comprises a power-supply conversion circuit for converting a primary power-supply voltage into a secondary power-supply voltage; a first switching element for placing the power-supply conversion circuit into an active state or an inactive stage; a capacitor for smoothing the secondary power-supply voltage; a second switching element for placing a load circuit powered by the smoothed secondary power-supply voltage into an active state or an inactive state; and a control circuit for supplying a control mode signal to the first switching element and the second switching element, respectively. A radio select call receiver comprises a radio reception unit driven by a first power-supply voltage for receiving radio carrier waves and identifying a unique call signal conveyed by the radio carrier waves; a signal processing unit performing various kinds of call processing based on the unique call signal; and a power-supply control circuit. The power-supply circuit comprises a power-supply conversion circuit for converting a primary power-supply voltage into a secondary power-supply voltage, a first switching element for placing the power-supply conversion circuit into an active state or an inactive state, a capacitor for smoothing the secondary power-supply voltage, a second switching element for placing a signal processing unit driven by the smoothed secondary power-supply voltage into an active state or an inactive state, and a control circuit for supplying a control mode signal to the first switching element and the second switching element, respectively.

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Kawasaki, Japan

Kimitoshi Niratsuka