Hitachi, Ltd.

Hitachi-high-technologies Corporation

Canon Inc.

Other

Denso Corporation

Hitachi Chemical Company, Ltd.

Kimiaki Ando

Haruo Yoda

Shunji Maeda

Yutaka Kaneko

Maki Tanaka

Takashi Hiroi

Hiroyuki Shinada

Yusuke Yajima

Mari Nozoe

Hitoshi Kubota

Yasutsugu Usami

Katsuhiro Kuroda

Aritoshi Sugimoto

Atsuko Takafuji

Katsuya Sugiyama

Kazushi Yoshimura

Hiroshi Tooyama

Tadao Ino

Mitsuo Ooyama

Yuji Inoue

Masato Muraki

Ryo Fujita

Norio Saitou

Kazuo Kaneko

Takehiro Ohkawa

Koji Nagata

Shinji Nishimura

Hiroyuki Takahashi

Yasushi Takahashi

Toru Miura

Yoshio Kawamura

Eiichi Amada

Masahide Okumura

Yoshikiyo Yui

Tadashi Sato

Shigeo Tsujioka

Kiyoshi Takahashi

Hiroyuki Kohida

Masahiro Takiguchi

Seiichi Kanema

Toshihisa Aoshima

Hisanobu Dobashi

Hozumi Hamada

Kiyoshi Umezawa

Hiroshi Kikuchi

Tatsuya Hirata

Hiromi Sato

Shigeru Date

Eiji Okamura

Mitsugu Yoneyama

Masanori Miyata

Takanori Simura

Provided is a method wherein a multi-anode detector is used for the purpose of detecting scattered light from a wafer, data obtained from the detector (multi-anode) for detecting defects is used, the shape of a beam radiated to the wafer, a rotational shift between the radius direction and the beam long side, and the like are calculated, and the optical axis of the irradiation beam is adjusted. Furthermore, the method is provided with a technique which feeds back the correction quantities for rotation and amplitude to inspection signal data, on the basis of the correction data, and corrects inspection data. Since fine correction with the adjustment of an optics system and signal processing is made possible, positional accuracy of defect inspection and accuracy of defect level (defect size) are improved.

Inspecting apparatus and inspecting method

High-contrast exposure is performed by use of a small dose of electron beams, a pattern is formed on a wafer with high accuracy, and high-precision inspection is performed. In pattern formation, proximity effect correction processing is performed. Moreover, exposure of electron beams is performed based on a result of filtering using an inverse characteristic of exposure characteristics of the electron beams. Furthermore, in pattern inspection, electron beams are irradiated based on a result of filtering for obtaining a peripheral region of an edge of the pattern formed.

Electron beam apparatus and method of generating an electron beam irradiation pattern

A circuit pattern inspection method and an apparatus therefore, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined changed state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.

Method and apparatus for inspecting integrated circuit pattern

In the present invention, vector data developing unit, ends separating unit, overlap removing unit and bitmapped data generating unit are sequentially connected in order to make pipeline processing. In addition, data of each raster is orderly arranged as a unit so that each processor can process data of each raster at a time. Each processor can make the pipeline processing to fast generate data. In addition, small-scale circuits can be used to realize the system because each raster can be processed as a unit of processing. Moreover, since data is orderly arranged before being processed, multi-valued bitmapped data can be generated in the order of drawing. Therefore, the drawing operation and data generating operation can be performed in parallel without use of any large-scale storage device.

Charged particle beam drawing apparatus

A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.

To make possible the in-line inspection of a pattern of an insulating material. A patterned waferformed with a pattern by a resist film is placed on a specimen tableof a patterned wafer inspection apparatusin opposed relation to a SEM. An electron beamof a large current is emitted from an electron gunand the pattern of the patterned wafer is scanned only once at a high scanning rate. The secondary electrons generated by this scanning from the patterned wafer are detected by a secondary electron detectorthereby to acquire an electron beam image. Using this electron beam image, the comparative inspection is conducted on the patterned wafer through an arithmetic operation unitand a defect determining unitSince an electron beam image of high contrast can be obtained by scanning an electron beam only once, a patterned wafer inspection method using a SEM can be implemented in the IC fabrication method.

A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with: the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.

The present invention provides an electron beam exposure method and an exposure apparatus suitable for use in the electron beam exposure technology for performing exposure on a sample placed on a sample table by an electron beam while continuously moving the sample table, both of which are capable of performing high-accuracy and high-speed exposure without being affected by glitch noise of a DA converter used for trace deflection of the electron beam. Displacements of the position of the sample table and the position to apply the electron beam are determined and the determined displacements are divided into the amount of a shot synchronous trace and the amount of a real time trace each synchronized with shot timing for applying the electron beam to thereby reduce the amount of the real time trace, whereby degradation in exposure accuracy due to the glitch noise of the DA converter used for trace deflection is prevented from occurring. It is therefore possible to carry out high-accuracy exposure. Since the number of trace region pass-changeovers can be reduced by increasing the range of trace deflection, wasted time can be reduced and hence high-speed exposure is made possible.

Electron beam exposure method and apparatus and semiconductor device manufactured using the same

The pattern line width of a coil is partially widened in a predetermined dimension and wiring patterns of a coil on the surface side and a coil on the rear side are arranged so as not to be in overlapped positions. Consequently, a direct current resistance of the coil can be reduced and an adverse influence by a self resonance of the coil on a communication can be reduced.

Contactless IC card

A reader/writer (RW) requires identification information pieces of respective plural IC cards (A, B, C). The plural IC cards return the respective identification information pieces in response to the requirement by the reader/writer. Logical addresses are assigned to some IC cards among the plural IC cards respectively to cause the reader/writer to select them in response to the return of the identification information pieces by the plural IC cards. The IC cards selected by the reader/writer are controlled. The reader/writer cancels the assignment of the logical address to one of the selected IC cards. The logical address, the assignment of which has been canceled by the reader/writer, is assigned to an IC card among the plural IC cards to which any logical address has not been assigned yet. The IC card to which the logical address has just been assigned is controlled.

Method and system for controlling contactless IC cards

A cell signal processing circuit is provided which is capable of precisely extracting a timing signal and a cell synchronizing signal. The cell signal processing circuit is principally composed of a signal adder circuit for adding a dummy signal comprising bit signals in a direct current balanced state to an end portion of respective inputted time series cell signals, and a separator circuit for separating and outputting the time series cell signals. Each dummy signal being composed of the same number of bits '0' and '1' is added to input signals in the form of time series cells such that signal cells are exchanged at a time of a bit '0' in the dummy signal. An optical switch apparatus using the cell signal processing circuit as an optical switch array is also provided which includes a photoelectric converter for converting the time series optical cell signal to an electric signal, a clock recovery circuit for extracting a clock signal from an output from the photoelectric converter, a cell synchronization circuit for extracting a cell synchronizing signal from the output from the photoelectric converter, and a decision circuit for deciding between signals in the output from the photoelectric converter by the use of the clock signal. The optical switch apparatus of the invention is simple and is not influenced by data loss and jitter.

Cell signal processing circuit and optical switch apparatus using the

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Hamura, Japan

Kimiaki Ando