Intel Corporation

Kimberley E Wagner

Lawrence T Clark

Mark A Schaecher

Richard J Burgess, Jr

Embodiments of the invention are disclosed that include a low power memory and a low power data path.

Method and apparatus for low power memory

Embodiments are disclosed that include a low power memory and/or a low power data path. One particular embodiment, for example, includes a technique to reduce power consumption. In one particular embodiment, for example, a grouping of bits, such as a 32-bit word, for example, is stored in inverted form if more than half of the bits have a bit value of logic &ldquo;1&rdquo; rather than logic &ldquo;0.&rdquo; Likewise, in this embodiment, if more than half of the bits have a bit value of logic &ldquo;0&rdquo; rather than logic &ldquo;1,&rdquo; then the grouping of bits is not stored in inverted form.

Briefly, in accordance with one embodiment of the invention, an integrated circuit comprises a first stage that provides differential outputs in one mode and substantially equal outputs in another mode.

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Chandler, AZ, United States of America

Kimberley E Wagner