Intel Corporation

Kim A Meinerth

Aditya Sreenivas

Krishnan Sreenivas

Thomas A Piazza

Val Gene Cook

Indraneel Ghosh

David W Watson

Brian K Langendorf

George R Hayek

Todd M Witter

Colyn Case

Brent S Baxter

David G Carson

Alankar Saxena

Richard W Jensen

John A Carey

Fong-Shek Lam

Paul A Jolly

Ashutosh Singla

Aditya Sreenvas

A configurable filter module for providing shared filter resource between an overlay engine and a texture mapping engine of a graphics system. The configurable filter may comprise a plurality of linear blend units each of which receives data input from one of the overlay engine and a mapping engine cache, and generates a linear blend filter output respectively; and a filter output multiplexer which receives data output from the linear blend units and selects a proper byte ordering output, wherein the linear blend units serve as an overlay interpolator filter to perform linear blending of the data input from the overlay engine during a linear blend mode, and serve as a texture bilinear filter to perform bilinear filtering of the data input from the mapping engine cache during a bilinear filtering mode.

Pixel filtering using shared filter resource between overlay and texture mapping engines

Method and apparatus for pixel filtering using shared filter resource between overlay and texture mapping engines

A method and apparatus for managing overlay data requests are disclosed. One embodiment of an apparatus includes a request unit and a timer. A request is made by a graphics controller to the request unit for a line of overlay data. The request unit divides the request from the graphics controller into a series of smaller requests. The smaller requests are issued to a memory controller. Delays are inserted between each of the smaller requests in order to allow other system resources to more easily gain access to memory.

Efficient management of memory access requests from a video data stream

An overlay video processing system provides an early start to pixel processing for the next overlay scan line. The overlay processor begins processing the next overlay scan line while still displaying the current scan line. A FIFO buffer is used to provide the overlay video data to the display. When the buffer provides a predetermined amount of data to the current overlay scan line, the buffer begins to load the data for the next overlay scan line. In one embodiment, the buffer may begin loading data for the next overlay scan line when approximately half the current overlay scan line is displayed.

Overlay scan line processing

System for efficient management of memory access requests from a planar video overlay data stream using a time delay

A display controller that includes a controller adapted to receive images selectable in real-time to any of a two or more of differing scanning resolutions, adapted to receive information regarding a fixed scanning resolution of a display device, and adapted to generate image borders taking into consideration the information of the fixed scanning resolution and a currently selected one of the two or more differing scanning resolutions, in order to control placement of the images on the display device.

System and method of aligning images for display devices

A method for controlling processing of overlay requests is disclosed. The method comprises the step of disabling an overlay request to a memory. The overlay request to system memory has expedited processing priority over requests to a system memory by other devices. The overlay request is disabled for a predetermined time period and enabled after the predetermined time period has elapsed.

Overlay counter for accelerated graphics port

An apparatus for an efficient display flip is disclosed. The apparatus has a computer readable medium having a graphics driver. The execution of the graphics driver is configured to generate instructions for checking status of a graphics device to determine whether the graphics device is ready to display a next frame data on a display device. The graphics device is coupled to a system memory. The graphics device is configured to forwarding a display flip status to the system memory for access by the graphics driver in response to the instructions.

Efficient display flip

A method and system for enhancing graphics processing through selected placement of at least one graphics operand in main memory. The system includes a graphics controller in communication with system memory through a dedicated graphics bus such as an Accelerated Graphics Port (AGP) bus. This allows texture maps, alpha blending data and other graphics information to be contained in system memory without degradation of system performance.

System and method for placement of operands in system memory

A graphics device implemented in accordance with one embodiment of the invention includes a first request path to a local memory interface for low-priority read transactions and a second request path to the local memory interface for low-priority write transactions. The second request path is also used for read transactions received over a system bus. The graphics device further includes an arbiter that arbitrates between the first request path and the second request path, with the second request path having a higher priority than the first request path.

Method and apparatus for improving processor to graphics device local

A method for mutual exclusion of drawing engine execution on a graphics device is disclosed. The method checks a busy signal of an executing drawing engine. The executing drawing engine is one of a plurality of drawing engines of the graphics device and the only drawing engine executing out of the plurality of drawing engines. The method forwards a graphics instruction and associated data packet to a next drawing engine to execute after the executing drawing engine has completed execution. The next drawing engine to execute is one of the plurality of drawing engines.

Mutual exclusion of drawing engine execution on a graphics device

A method for communicating graphics device status information to a graphics driver. Status of a graphics device is checked to determine whether the graphics device is ready to process a next instruction. A location in cacheable memory accessible to a graphics driver is updated with the status. The graphics driver reads the status to determine when to generate the next instruction for processing by the graphics data. A first instruction to be forwarded to the graphics device is generated. A status in an operating register in the graphics device is updated indicating that an event is being monitored. The updating is performed in response to receipt of the first instruction by the graphics device. The status is written to a second cacheable location in system memory accessible to the graphics driver. A second instruction is generated by the graphics driver to provide a predetermined address and instruction completion data to the graphics device.

Store double word and status word write graphics primitives

A high throughput memory access interface is provided. The interface includes features which provide higher data transfer rates between system memory and video/graphics or audio adapters than is possible using standard local bus architectures, such as PCI or ISA. The interface allows memory access requests to be performed in such a manner that only portions of an access request are required to be transmitted to the target device for certain bus transactions. Each access request includes command bits, address bits, and length bits. In the initiating device, each access request is separated into three segments, which are stored in separate registers in both the initiating device and the target device. Only the segment which contains the lowest order address bits and the length bits is required by the target device to initiate the bus transaction. Thus, if either of the other two segments has not changed since the previous access request, then such segment or segments are not transmitted to the target. If such segment or segments have changed since the previous access request, then they are provided to the target only for purposes of updating state in the target. Access requests may optionally be provided to the target on a separate port from the port used to transmit data in response to access requests.

Growing community of inventors

Granite Bay, CA, United States of America

Kim A Meinerth