Himax Imaging, Inc.

Kihong Kim

Yu Hin Desmond Cheung

Hack Soo Oh

Yang Wu

Desmond Cheung

Yu-Jui Hsieh

Youngchul Sohn

Feixia Yu

Inna Patrick

A CMOS image sensor includes: a substrate containing a potential well stack including: a first p-well, a first n-well disposed below the first p-well, a second p-well disposed below the first n-well, a second n-well disposed below the second p-well, and a third p-well disposed below the second n-well, wherein a first photodiode is formed at the junction between the first p-well and first n-well, a second photodiode is formed at the junction between the first n-well and second p-well, a third photodiode is formed at the junction between the second p-well and the second n-well, and a fourth photodiode is formed at the junction between the second n-well and the third p-well, and each photodiode is disposed at a different respective depth within the substrate; and a plurality of active pixel sensors for converting light received by the photodiodes into electrical charge.

CMOS RGB-IR sensor with quadruple-well stack structure

A color filter structure includes a material stack disposed on a substrate, a material stack disposed in the substrate, a first trench penetrating the material stack and exposing a first metal pad, a scribe line trench penetrating the material stack and exposing a scribe line metal pad, a first filling material partially filling the first trench and substantially filling up the scribe line trench, a second filling material partially filling the first trench and the first filling material and the second filling material together substantially fill up the first trench, and a color filter material covering an optical uniform surface which the material stack, the first filling material and the second filling material together form.

Color filter structure and method to construct topography of stack structure

A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the ordinary FD node. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Pixel circuit

A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. All of the front-end circuit, the signal storage circuit and the output circuit are coupled to a common floating diffusion (FD) node. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage of the signal storage circuit. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to voltage levels of the common FD node, respectively.

A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the signal storage circuit. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Pixel circuit for generating output signals in response to incident radiation

A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. The signal storage circuit is coupled to the front-end circuit, and the output circuit is coupled to the signal storage circuit. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

An image sensor includes a substrate, multiple pixel regions separately disposed in the substrate, and a pick up region including a doping region and a pick up plug obliquely disposed on the doping region and directly contacting the doping region.

Image sensor with oblique pick up plug and semiconductor structure comprising the same

A complementary metal-oxide-semiconductor (CMOS) image sensor includes an implant region of a second type formed in a crystalline layer of a first type. A channel of a transfer gate entirely covers the implant region, which partially joins a photodiode, a doped well and a floating diffusion node.

CMOS image sensor and a method of forming the same

A process of forming a semiconductor device includes second-type blanket implanting a first-type semiconductor substrate to form a second-type implant layer therein; second-type implanting the semiconductor substrate through a first mask to form second-type wells in a second region of the semiconductor substrate; and first-type implanting the semiconductor substrate through a second mask to form isolations in a first region of the semiconductor substrate and to compensate complementary sub-regions of the second region.

Process of forming a semiconductor device

In accordance with at least some embodiments of the present disclosure, a process for fabricating a light pipe (LP) is described. The process may be configured to construct a semiconductor structure having an etch-stop layer above a photodiode region and a first dielectric layer above the etch-stop layer. The process may be configured to etch a LP funnel through the first dielectric layer. And the process may be further configured to stop the etching of the LP funnel upon reaching and removing of the etch-stop layer.

Growing community of inventors

Tainan, Taiwan

Kihong Kim