Microfabrica Inc.

University of Southern California

Kieun Kim

Adam L Cohen

Michael S Lockard

Dennis R Smalley

Ananda H Kumar

Gang Zhang

Uri Frodis

Ezekiel J J Kruglick

Richard T Chen

Vacit Arat

Rulon Joseph Larsen, Iii

Ming Ting Wu

Young Kim

Qui T Le

Dale S McPherson

Willa M Larsen

Christopher A Bang

Jorge Sotelo Albarran

Pavel B Lembrikov

Jeffrey A Thompson

Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions.

Multi-layer, multi-material micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties

Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates

Embodiments are directed to methods of producing devices using modified multi-layer, multi-material electrochemical fabrication processes and/or using a laser cutting processes wherein individual layers or layer groups are formed and then stacked and bonded to produce prototypes or production parts. The methods can reduce the cost and lead time of prototyping when compared with previous multi-layer, multi-material electrochemical fabrication processes and can also reduce the lead time of production quantities, by allowing multiple layers of a multilayer device to be formed simultaneously, e.g. in parallel on the same wafer. Additionally, these methods may be used to extend the maximum height to which parts may practically be made. Finally, the methods allow geometries that are impossible, impractical or difficult to release (e.g. microfluidic devices such as pumps or parts with long, narrow channels) to be fabricated in multiple pieces and then joined after full or partial release.

Stacking and bonding methods for forming multi-layer, three-dimensional, millimeter scale and microscale structures

Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that (1) partially coats the surface of the structure, (2) completely coats the surface of the structure, and/or (3) completely coats the surface of structural material of each layer from which the structure is formed including interlayer regions. These embodiments incorporate both the core material and the shell material into the structure as each layer is formed along with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a material that would be removed with sacrificial material if it were accessible by an etchant during removal of the sacrificial material.

Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers.

Method of electrochemically fabricating multilayer structures having improved interlayer adhesion

Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

Methods of forming three-dimensional structures having reduced stress and/or curvature

Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.

Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

Probe arrays and method for making

Multilayer test probe structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments each probe structure may include a plurality of contact arms or contact tips that are used for contacting a specific pad or plurality of pads wherein the arms and/or tips are configured in such away so as to provide a scrubbing motion (e.g. a motion perpendicular to a primary relative movement motion between a probe carrier and the IC) as the probe element or array is made to contact an IC, or the like, and particularly when the motion between the probe or probes and the IC occurs primarily in a direction that is perpendicular to a plane of a surface of the IC. In some embodiments arrays of multiple probes are provided and even formed in desired relative position simultaneously.

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Pasadena, CA, United States of America

Kieun Kim