Phison Electronics Corporation

Kian-Fui Seng

Ming-Hui Tseng

Chih-Kang Yeh

Ching-Hsien Wang

Ruei-Cian Chen

A controlling method, a connector, and a memory storage device are provided. The controlling method includes following steps. A connection between the memory storage device and a host system is established. A first command is received from the host system and stored into a command queue. The command queue includes at least one second command after the first command is stored into the command queue. Whether a command number of the second commands is greater than a threshold is determined. The threshold is greater than 1. If the command number is greater than the threshold, a using right of the connection is obtained and a second command is executed by the memory storage device. If the command number is not greater than the threshold, a command from the host system is waited for. The using right of the connection belongs to the host system. Thereby, the system efficiency is improved.

Controlling method, connector, and memory storage device

A command executing method, a connector and a memory storage device are provided. The command executing method includes: receiving at least one command and at least one tag corresponding to the command from a host system, and temporarily storing the command in a command queue; transmitting the tag to the host system and executing the command; determining whether an operating status of the memory storage device meets a predetermined condition; and if the operating status meets the predetermined condition, transmitting a configuration message to the host system to release the tag from corresponding to the command. Accordingly, the access bandwidth of the memory storage device is increased.

Command executing method, connector and memory storage device

A data processing method, a memory storage device, and a memory control circuit unit are provided. Here, each physical address corresponds to one flag. The data processing method includes: receiving a reading command; reading first data stored in the physical addresses of a physical programming unit; determining whether a first flag in the physical programming unit is in a first status or a second status; transmitting decrypted first data or decrypted specific-format data to a host system according to whether the first flag is in the first status or the second status. Accordingly, the encryption operation may be simplified.

Data processing method, memory storage device and memory control circuit unit

A method of programming memory cells for a rewritable non-volatile memory module is provided. The method includes: receiving a command which indicates performing an update operation to a logical page; and identifying valid logical access addresses and invalid logical access addresses in the logical page according to the command. The method also includes: selecting a physical page; setting flags corresponding to the valid logical access addresses in a valid state, setting flags corresponding to the invalid logical access in an invalid state; programming the flags and data belonging to the valid logical access addresses to the selected physical page based on the update operation; and mapping the selected physical page to the logical page. Accordingly, the method can effectively increase the speed of programming the memory cells.

Method of programming memory cells and reading data, memory controller and memory storage apparatus using the same

A wear leveling method for a flash is provided, wherein the flash memory includes a plurality of physical blocks grouped into at least a data area and a spare area. The method includes setting a first predetermined threshold value as a wear-leveling start value and randomly generating a random number as a memory erased count, wherein the random number is smaller than the wear-leveling start value. The method also includes counting the memory erased count each time when the physical blocks are erased and determining whether the memory erased count is smaller than the wear-leveling start value, wherein a physical blocks switching is performed between the data area and the spare area when the memory erased count is not smaller then the wear-leveling start value. Accordingly, it is possible to uniformly use the physical blocks, so as to effectively prolong a lifetime of the store system.

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Hsinchu, Taiwan

Kian-Fui Seng