Samsung Electronics Co., Ltd.

Hyundai Electronics Industries Co. Ltd.

Nhn Corporation

Ki-sung Kim

Chang-Hwan Hwang

Yoon-Young Cho

Jae-Woong Chung

Byung-Gil Choi

Hyok-Su Choi

Yun-Bin Jung

Young-Ju Yeo

Woo-Yeong Cho

Du-Eung Kim

Seung-Min Park

Chang-hwan Hwang

Jong Hoon Oh

Taek Woon Kim

Jong-Chul Park

Woo-seop Kim

Han-sung Joo

Seung-You Baek

Soo-Jin Paek

Sang-min Hyun

Nam-Mi Kim

Young-Keun Lee

Kwang-Jin Lee

Jun-youn Kim

Jun-Soo Bae

Ki-Won Lim

Heon-su Jeon

Young-ran Kim

Chang-han Choi

Young-Ran Kim

Ho-keun Cho

Jong-soo Seo

A memory controller may detect degradation in accordance with a bit error rate (BER) of the resistive memory device including memory cells. The memory controller may control the memory cells to be programmed to a first resistance state, read the programmed memory cells, and receive the BER of the memory cells generated during a read operation from the resistive memory device. The memory controller may determine a quantity of program cycles of the memory cells based on the BER. The quantity may be determined based on reference to a lookup table indicating a correlation between the BER and the quantity of program cycles.

Methods and systems for detecting degradation of resistive memory devices

A memory controller may control a resistive memory device including memory cells may control the resistive memory device to program the memory cells into a first resistance state, control the resistive memory device to read data from the memory cells that are programmed, receive bit error rates (BER) of the memory cells, occurring in a read operation, from the resistive memory device, may determine the number of program operations on the memory cells corresponding to the BER and may, based on the number of program operations that is determined, control the memory cells to be programmed into the first resistance state by using a write current having a current level higher than that of a minimum write current required for the memory cells to be changed into the first resistance state.

Methods and systems for compensating for degradation of resistive memory device

A semiconductor package having a structure in which heat produced in the interior of the package is effectively spread to the outside of the package is provided. The semiconductor package includes one or more semiconductor chips, one or more substrates (PCBs) having the semiconductor chips respectively attached thereto, a plurality of conductive balls such as a plurality of solder balls to provide voltages and signals to the one or more semiconductor chips, and a heat sink positioned to spread heat produced in the interior of the package to the outside and directly connected to at least one of the plurality of solder balls.

Semiconductor package having improved heat spreading performance

Mobile phone

Provided are a method and a system for applying site activity indexes by a site activity index applying system connected to a plurality of user terminals through the Internet. In one embodiment, the method includes checking whether a user who is connected to a web site through the Internet desires to buy a game item, checking whether to use the user's site activity indexes so as to buy the game item, checking whether the user possesses site activity indexes, and exchanging the site activity indexes with game items when the user possesses the site activity indexes. With the method and system for applying site activity indexes user loyalty and game participation may be increased.

Method for making use of site activity index and a system thereof

A nonvolatile memory device using a variable resistive element is provided. The nonvolatile memory device may include a memory cell array which includes an array of multiple nonvolatile memory cells having variable resistance levels depending on data stored. Word lines may be coupled with each column of the nonvolatile memory cells. Local bit lines may be coupled with each row of the nonvolatile memory cells. Global bit lines may be selectively coupled with the multiple local bit lines.

Nonvolatile memory devices using variable resistive elements

Disclosed is a method of driving a multi-level variable resistive memory device. A method of driving a multi-level variable resistive memory device includes supplying a write current to a variable resistive memory cell so as to change resistance of the variable resistive memory cell, verifying whether or not changed resistance enters a predetermined resistance window, the intended resistance window depending on the resistance of reference cells, and supplying a write current having an increased or decreased amount from the write current supplied most recently on the basis of the verification result so as to change resistance of the variable resistive memory cell.

Method of driving multi-level variable resistive memory device and multi-level variable resistive memory device

Nonvolatile memory devices include a plurality of nonvolatile memory cells and a write circuit that is operable to write data to the nonvolatile memory cells over a plurality of consecutive division write periods by generating a plurality of write pulses whose peaks do not coincide with one another to the nonvolatile memory cells.

Nonvolatile memory devices that include a write circuit that writes data over multiple write periods using pulses whose peaks do not coincide with each other

Growing community of inventors

Seoul, South Korea

Ki-sung Kim