Samsung Electronics Co., Ltd.

Lg Electronics Inc.

3m Innovative Properties Company

Skhynix Inc.

Ki-Sun Kim

Yongsuk Yang

Gyu Jin Jung

Kyosung Hwang

Young-Ho Kim

Young-sun Kim

Dong-Min Kim

Jae-young Ahn

Jin-Gyun Kim

Eun-ae Chung

Seok-chan Lee

Jae-bum Lee

Jin-Tae Noh

Jong-rak Sohn

Sang-Yeon Kim

Kyu-Hun Lee

Ju-seok Lee

Ju-Seoub Kim

Kyung-Soo Suh

Yong-Hun Seung

Yong-Ho Seung

The present invention relates to an adhesive film comprising an adhesive layer; a photothermal conversion layer containing a light absorber and a thermally decomposable resin; and an adhesive base film layer disposed between the adhesive layer and the photothermal conversion layer, wherein the adhesive base film layer contains a multifunctional epoxy resin, a binder resin, a curing agent, and a curing catalyst. The adhesive film according to the present invention may be able to simplify a processing process of a substrate, and prevent damage to the substrate and circuits or elements formed on the substrate.

Adhesive film

The present disclosure relates to an adhesive film, and adhesive film includes: a photothermal conversion layer including a light absorbing agent and a pyrolytic resin; an adhesive base film layer disposed on the photothermal conversion layer; a buffer layer disposed on the adhesive base film layer; and an adhesive layer disposed on the buffer layer, and the buffer layer includes a polysiloxane resin, and the adhesive layer includes a silicon-based adhesive, and the silicon-based adhesive includes a silicon-based tackifier and a polysiloxane resin. The adhesive film according to the present disclosure can simplify a process of processing a substrate, and can prevent a damage of the substrate and a circuit or an element formed on the substrate.

A memory controller includes a plurality of ports coupled with a host device and a plurality of channels coupled with a memory device. The memory controller also includes an arbiter receiving a first address received through the plurality of ports to output the first address; a mapping table storage block, including a plurality of address mapping tables, selecting an address mapping table, corresponding to the first address, among the plurality of address mapping tables and outputting the selected address mapping table as a variable address mapping table; an address mapping block mapping the first address to a second address according to the variable address mapping table, and a fixed address mapping table; and a scheduler outputting the second address to the channels. The plurality of address mapping tables may employ different methods of mapping one or more first bits of the first address to the second address.

Memory controller and system including variable address mapping tables and a fixed address mapping table

Disclosed are a card socket device and an electronic apparatus including the same. The card socket device includes a seat portion configured to receive an attachable card; and one or more connection terminal portions formed in the seat portion and configured to form an electrical connection with one or more connection pads formed in a bottom surface of the attachable card, wherein the seat portion is configured such that a space accommodating the attachable card is upwardly opened.

Card socket device and electronic apparatus including the same

A camera assembly for a mobile communication device comprises a camera and a case adapted to accommodate the camera. The case is adapted to elastically support the camera with the elastic support being biased in one direction. The camera assembly is adapted for slidably drawing the camera in the case against the elastic support bias. The camera assembly is also adapted for slidably drawing the camera out of the case under the elastic support bias.

Camera assembly for a mobile communication device

A semiconductor memory device includes a semiconductor substrate. An inter-layer dielectric is disposed on the semiconductor substrate. A bit line is disposed on the inter-layer dielectric. A bit line spacer is fabricated of a nitride layer containing boron and/or carbon and covers sidewalls of the bit line. A method of fabricating the semiconductor memory device is also provided.

Semiconductor memory device and method of fabricating the same

A semiconductor device includes a lower electrode of a capacitor, a dielectric layer disposed on the lower electrode, and an upper electrode of the capacitor disposed on the dielectric layer. The upper electrode includes a doped poly-SiGelayer. An interlayer insulating layer is disposed on the doped poly-SiGelayer and has a contact hole partially exposing the doped poly-SiGelayer. A metal contact plug is in the contact hole and an interconnection layer is disposed on the interlayer insulating layer and connected to the metal contact plug. Related interconnection structures and fabrication methods are also disclosed.

Semiconductor interconnection structures and capacitors including poly-SiGe layers and metal contact plugs

There is provided a liquid crystal display (LCD) assembly having a plurality of members, where the outer periphery of each member corresponds with the respective outer periphery of the other members, comprises a LCD panel and a liquid crystal injection member installed at a first edge of the LCD assembly for injecting liquid crystals. The LCD panel comprises upper and lower panels and liquid crystals are injected between the upper and lower panels through an injection area. The injection area is sealed in between the upper and lower panels to contain the injected liquid crystals. The LCD assembly further comprises a reflective plate for reflecting incident light, which is fastened to a backlight by one or more double-sided adhesive strips engaging one or more edges of the plate and backlight, other than the edges that correspond with the first edge of the injection area.

Liquid crystal display assembly comprising fasteners for attaching LCD panel and backlight together to a support member

Growing community of inventors

Seoul, South Korea

Ki-Sun Kim