Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Mk Electron Co., Ltd.

Nexus Dx, Inc.

Ki Ju Lee

Jin Su Kim

Jong Jin Park

Myung Sam Kang

Do Jae Yoo

Jin Won Choi

Jong In Ryu

Jong Cheol Kim

Young Chan Ko

Kyung Kyun Kang

Jeong Seok Kim

Bong Ju Cho

Jung Tae Lee

Young Woo Lee

Yon Ho You

Chung Ung Kim

Ki Joo Sim

Eun Jeong Jang

Young Goun Lee

Byung Wook Jeong

Suk Yong Lee

Jai Pil Jung

Hee Yul Lee

Ik Kyu Jin

Gyo Young Jung

Im Ho Shin

Su Bong Bae

Dong Hwi Cho Cho

Dong Hwi Cho

A semiconductor package includes a connection structure including a redistribution layer, a plurality of under bump metal layers electrically connected to the redistribution layer, a passivation layer which overlaps at least portions of side faces of the plurality of under bump metal layers, and includes a first trench disposed between under bump metal layers adjacent to each other, a surface mounting element which is on the under bump metal layers adjacent to each other, connected to the redistribution layer, and overlaps the first trench, and an underfill material layer that is between a portion of the passivation layer and the surface mounting element, and is in the first trench. The first trench extends in a first direction and includes a first sub-trench having a first width in a second direction, and a second sub-trench having a second width different from the first width in the second direction.

Semiconductor package including a trench in a passivation layer

A fan-out semiconductor package including a first redistribution layer; a first semiconductor chip on the first redistribution layer; an interconnector on the first redistribution layer and spaced apart from the first semiconductor chip; a molded layer covering the interconnector and side surfaces of the first semiconductor chip; and a second redistribution layer on the molded layer, wherein the interconnector includes a metal ball and is electrically connected to the first redistribution layer, the second redistribution layer includes a first line wiring, and a first via electrically connected to the first line wiring, the first via is connected to the interconnector, and a part of the first via is in the molded layer.

Fan-out semiconductor package

A blood testing apparatus includes an analyzer configured to analyze blood components of an animal that are included in a test medium; an output device configured to display analysis results of the blood components; and a controller configured to determine a species of the animal based on at least one from among types of the blood components and the analysis results of the blood components and control the output device to display the determined species of the animal.

Blood testing apparatus and control method thereof

A semiconductor package mounted board includes a printed circuit board on which a plurality of first pads and a plurality of second pads are disposed on one surface, and a semiconductor package disposed on the one surface of the printed circuit board and including a plurality of third pads and a plurality of fourth pads. A plurality of first electrical connection structures electrically connect the plurality of first pads and the plurality of third pads, and one or more second electrical connection structures electrically connect the plurality of second pads and the plurality of fourth pads. The plurality of first pads are disposed to correspond to and overlap/align with the plurality of third pads from each other, and the plurality of second pads are disposed to be staggered and offset with respect to the plurality of fourth pads.

Semiconductor package mounted substrate

A semiconductor package includes: a connection member having first and second surfaces opposing each other and including a redistribution layer; a support member disposed on the first surface of the connection member, including a cavity, and having an inner sidewall surrounding the cavity of which an upper region is chamfered; a semiconductor chip disposed on the connection member in the cavity and having connection pads electrically connected to the redistribution layer; at least one electronic component disposed between the semiconductor chip and the inner sidewall and having connection terminals electrically connected to the redistribution layer; and an encapsulant encapsulating the semiconductor chip and the at least one electronic component disposed in the cavity.

Semiconductor package

A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.

Semiconductor package with improved signal stability and method of manufacturing the same

A test device and a method for controlling the test device are disclosed. After a test is interrupted due to a malfunction of the test device, the test device continuously performs the interrupted testing. The test device for testing a biological material includes: a memory configured to store information which relates to progress of a test; and a controller which, if the test is interrupted due to a malfunction of the test device, is configured to continue performance of the test by using the information which relates to the test progress which is stored in the memory.

Test device and method for controlling the same

A test platform is provided for testing a detection module of a test apparatus to determine whether correction is needed or for quality control of the test apparatus. The test platform includes a body, and at least one reference material which is formed on the body and on which at least one color is printed.

Test platform, test apparatus and control method thereof

Disclosed herein a solder injection head including: a bump material storing part having a bump material stored therein; a discharging part having one side connected to the bump material storing part and discharging the bump material to the outside; a heating part formed at at least one side of the discharging part and heating the bump material passing through the discharging part; and a press-fitting part press-fitting the bump material discharged to the outside and injecting the bump material onto a substrate.

Solder injection head

A lead free solder is provided. The lead free solder includes about 1.5 wt % to about 2.5 wt % silver (Ag), about 3 wt % to about 6 wt % bismuth (Bi), about 0.005 wt % to about 0.1 wt % of a deoxidizing agent, and a balance of tin (Sn). The lead free solder has improved wettability, a lowered melting point, little or substantially no formation of oxidation layer in a solder bath, suppressed brittleness, improved thermal shock resistance and drop resistance.

Lead free solder containing Sn, Ag and Bi

Growing community of inventors

Suwon-si, South Korea

Ki Ju Lee