Samsung Electronics Co., Ltd.

Ki-hyun Kim

Jae-seong Shim

Hyun-Soo Park

Kiu-hae Jung

Iqbal Mahboob

Yoon-woo Lee

In-sik Park

Sung-hyu Han

Sung-hee Hwang

Igbal Mahboob

Kyung-geun Lee

Hyun-jung Kim

A method of generating and allocating codewords includes allocating one of two selectable codewords band bas codeword 'b' when a preceding codeword 'a' and a following codeword &#x201c;b&#x201d; form a code stream X, in which the codewords band bhave opposite INV values which are parameters indicating whether the number of '1s' contained in a codeword is an odd number or an even number. When the code stream of the preceding codeword &#x201c;a&#x201d; and the following codeword bis X, and when the code stream of the preceding codeword &#x201c;a&#x201d; and the following codeword bis X, the codewords are allocated such that the INV values of Xand Xare maintained to be opposite when the preceding codeword &#x201c;a&#x201d; or the following codeword b(b) (bor b) should be replaced by another codeword in compliance with a predetermined boundary condition given between codewords. The codewords are allocated so that a DC suppression capability of the code stream can be maintained.

Code generation and allocation apparatus

A method of recording data includes forming a plurality of codewords by error correction coding a predetermined amount of inputted data according to a predetermined method, and recording the data including the plurality of codewords to the small-sized optical disc in a recording unit of a shorter length than a predetermined track of an inner circumference region of the small-sized optical disc.

Method of error correction coding, and apparatus for and method of recording data using the coding method

A method of converting a parity check matrix for low density parity check coding comprising moving rows and columns of the parity check matrix such that the parity check matrix includes a lower triangular submatrix. A calculation load for creating parity information can be reduced by using the converted parity check matrix including the lower triangular submatrix.

Method of converting parity check matrix for low density parity check coding

Code generation and allocation method

An error correction encoding method including generating error correction code data, which is a predetermined number of bytes long, by error-correction-encoding user data in a predetermined manner; generating burst indicator subcode data, which is a predetermined number of bytes long and is used to detect errors that have occurred in the user data; dividing the error correction code data into a plurality of sub-error correction code data each having a length that is less than the error correction code data; dividing the burst indicator subcode data into a plurality of sub-burst indicator subcode data having a length that is less than a minimal data unit that is error-correction-encodable; and alternately arranging the plurality of sub-error correction code data and the plurality of sub-burst indicator subcode data.

Error correction encoding apparatus and method and error correction decoding apparatus and method

A method of generating error correction parity information using a parity check matrix having m rows and n columns, wherein m is a number of parity bits and n is a number of codeword bits, wherein a same fixed number of elements in each of the rows has a value of 1 and all remaining elements in each of the rows has a value of 0, and wherein a same fixed number of elements in each of the columns has a value of 1 and all remaining elements in each of the columns has a value of 0, the error correction method including generating a lower triangular matrix in 1st through k-th rows and (n&#x2212;m+1)-th through (n&#x2212;m+k)-th columns of the parity check matrix by performing row and column permutations on the parity check matrix, wherein k&#x3c;m; and obtaining m parity bits using the parity check matrix including the lower triangular matrix and (n&#x2212;m) message bits.

Method and apparatus for generating parity information for error correction

An error correction coding apparatus includes a parity check matrix generation unit which generates a parity check matrix having a number of elements having a value of 1 in each row thereof, having a predetermined number of elements having a value of 1 in each column thereof, and having the other elements having a value of 0; a parity check matrix adjustment unit which receives the parity check matrix from the parity check matrix generation unit, searches the parity check matrix for a cycle forming group of four elements positioned at respective vertexes of a rectangle and having a value of 1, and when there is at least one cycle forming group, replaces the value of 1 of at least one element of the cycle forming group with the value 0 of another element, to output a adjusted parity check matrix without a cycle forming group therein; and an LDPC coding unit which receives the adjusted parity check matrix from the parity check matrix adjustment unit and receives an m-bit message word to perform LDPC coding.

Error correction coding apparatus and method

An LDPC decoding method and apparatus of LDPC decoding a codeword formed by c code bits transmitted through a channel include receiving the codeword and a p&#xd7;c parity check matrix formed of 0 and 1 values, comparing the codeword with each of p rows of the parity check matrix, the rows formed with c elements, generating an R matrix by obtaining a first minimum value that is a minimum value among elements that are not 0 in each row, a second minimum value that is a second smallest value in the same row, and a location of the first minimum value, and outputting a decoded codeword formed by c code bits by determining one code bit by adding elements of each column of the R matrix.

LDPC decoding apparatus and method

A clock signal generating system using a wobble signal and a data reproducing apparatus, has a first block to detect a frequency error signal or a phase error signal from the RF signals on the recording medium and to output the detected frequency error signal or the detected phase error signal. A second block detects a wobble error signal from the wobble signals on the recording medium and outputs the detected wobble error signal. A clock generating unit generates a clock signal using the detected frequency error signal or the detected phase error signal of the second block when the RF signals have an error, and using the detected wobble error signal of the first block when the wobble signals have an error.

Clock signal generating system using a wobble signal and data reproducing apparatus

A method of generating and allocating codewords includes allocating one of two selectable codewords band bas codeword 'b' when a preceding codeword 'a' and a following codeword &#x201c;b&#x201d; form a code stream X, in which the codewords band bhave opposite INV values which are parameters indicating whether the number of '1s' contained in a codeword is an odd number or an even number. When the code stream of the preceding codeword &#x201c;a&#x201d; and the following codeword bis X, and when the code stream of the preceding codeword &#x201c;a&#x201d; and the following codeword bis X, the codewords are allocated such that the INV values of Xand Xare maintained to be opposite when the preceding codeword &#x201c;a&#x201d; or the following codeword b(b)(bor b) should be replaced by another codeword in compliance with a predetermined boundary condition given between codewords. The codewords are allocated so that a DC suppression capability of the code stream can be maintained.

A selective disturbance compensating apparatus for use in reproduction from an optical recording medium, and a 3T-correcting method. A DC offset canceller extracts a DC offset from a reproduction signal to cancel the DC offset. An equalizer equalizes the offset-cancelled signal. A switching unit selects between the offset-canceled signal and the equalized signal according to whether distortion caused by asymmetry of the signal is above or below a predetermined reference level. A 3-T correcting unit corrects asymmetry of the selected signal. In another embodiment, a second switching unit selects between the 3-T corrected signal and a Viterbi corrected signal.

Selective disturbance compensating apparatus used in reproduction from optical recording medium and 3T-correcting method

A method of generating and allocating codewords includes allocating one of two selectable codewords b and b as codeword &ldquo;b&rdquo; when a preceding codeword &ldquo;a&rdquo; and a following codeword &ldquo;b&rdquo; form a code stream X, in which the codewords b and b have opposite INV values which are parameters indicating whether the number of '1s' contained in a codeword is an odd number or an even number. When the code stream of the preceding codeword &ldquo;a&rdquo; and the following codeword b is X , and when the code stream of the preceding codeword &ldquo;a&rdquo; and the following codeword b is X , the codewords are allocated such that the INV values of X and X are maintained to be opposite when the preceding codeword &ldquo;a&rdquo; or the following codeword b (b ) (b or b ) should be replaced by another codeword in compliance with a predetermined boundary condition given between codewords. The codewords are allocated so that a DC suppression capability of the code stream can be maintained.

A code modulation and demodulation method includes removing a DC component of a code stream to be modulated when source data is recorded on an optical information storage medium and controlling a suppression of the DC component contained in the code stream when the source data is converted into a codeword to be recorded on an optical information storage medium. The method includes determining a control timing to suppress the DC component of the code stream to which the source data are converted, performing a code conversion at each control time for the DC component so that the code stream branches into a pair of branch code streams one of which extends in a direction where a running digital sum (RDS) of the code stream increases, and another one of which extends in the direction where the RDS of the code stream decreases, and selecting the path of the code stream that has a most bounded path around RDS '0' from the paths of the branch code streams each control time. By performing a regular DC suppression control when the source data is converted, and by selecting one of the branch code streams when the DC suppression control is performed, more DC components in the code stream can be effectively removed.

Growing community of inventors

Daejeon Metropolitan, South Korea

Ki-hyun Kim