Lg Chem, Ltd

Samsung Electronics Co., Ltd.

Electronics and Telecommunications Research Institute

Samsung Electro-mechanics Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Lg Energy Solution, Ltd.

Korea Atomic Energy Research Institute

Lg Electronics Inc.

Korea Institute of Science and Technology

Mando Corporation

Korea Institute of Energy Research

Dongwoo Fine-chem Co., Ltd.

National Cancer Center

Korea Hydro Nuclear Power Co., Ltd.

Ki Hwan Kim

Yong Chan Kim

Jeong Woo Shon

Pilsung Jo

Nansra Heo

Song Ho Jang

Jin Suk Song

Su Jin Kim

Jin-Wook Kim

Junggun You

Eun Kyung Kim

Gi Gwan Park

Je Young Kim

Jin Pyo Kim

Yong Ju Lee

Kyung Ho Kim

Sang Hyun Park

Jin Wook Kim

Sujin Kim

Young Dae Cho

Su Jin Jung

Sung Uk Jang

Dongsuk Shin

Sangcholl Han

Gigwan Park

Dong Suk Shin

Jin Hyong Lim

Jung Gun You

Yoon Ah Kang

Young Il Seo

Nam Kyu Park

Eun Ah Joo

Jae Mo Goh

Cheol Hee Park

Bong Soo Kim

Je Hyun Lee

Sang Yoon Lee

Kang Hun Moon

Dong A Lim

Cho Eun Lee

Ji Hee Moon

Sangwook Woo

Dong Hyun Oh

Doo Young Kim

Ji Young Hwang

Eun Soo Nam

Myung Sam Kang

Sang Wook Woo

Hyun Hee Gu

Hae Suk Chung

Hyung Jin Jung

Oh Byong Chae

Jin Ho Kim

Chi Hoon Jun

Jae Joon Lee

Sujin Jung

Oh Kee Kwon

Sangmoon Lee

Su Hwan Oh

Sung Joon Min

Ki Tae Kim

Sang Choon Ko

Pankwi Park

Han Min Seo

Young Il Kim

Cheol Hwan Kim

Ara Cho

Hee Won Choi

Yong Soon Baek

Sunguk Jang

Choeun Lee

Won Kook Choi

Ho Young Kim

Seung Heon Han

Jung Tae Kim

Sang Joon Park

Ohbyong Chae

Dong Yun Jung

Young Rak Park

Jihye Gwak

Ilha Lee

Jung Tae Park

Jin Hyung Lim

Suk Hyeon Cho

Hyung Seok Lee

Eun Jeong Lee

Sam Chul Ha

Jeho Na

Kyungho Kim

Kee Shik Shin

Seok-Keun Koh

Jun Young Lee

Kyung Hoon Yoon

Seok-Jin Oh

Byung Woo Jeon

Kyung Mi Kim

Joon Hee Cho

Byung Ha Kang

Young Kyung Lim

Jeong-Yong Park

A semiconductor device is provided. The semiconductor device includes: an active pattern extending in on a substrate; nanosheets stacked on the active pattern; a gate electrode on the active pattern and surrounding the nanosheets; a source/drain trench on the active pattern adjacent the gate electrode; and a source/drain region in the source/drain trench, The source/drain region includes: a first layer provided along a sidewall and a bottom surface of the source/drain trench, the first layer having a first n-type impurity doped therein; a second layer on the first layer in the source/drain trench, the second layer having germanium (Ge) doped therein; and a third layer filling a remaining portion of the source/drain trench on the second layer, the third layer having a second n-type impurity doped therein.

Semiconductor device

A semiconductor device includes a substrate including an active pattern; a source/drain pattern on the active pattern; a gate electrode on the active pattern; and a gate spacer on the source/drain pattern. The source/drain pattern includes a first semiconductor layer on the active pattern and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer includes a first inner sidewall and second inner sidewall on the second semiconductor layer. A distance between the first and second inner sidewalls of the first semiconductor layer decreases according as positions of two portions of the first semiconductor layer where the distance is measured become closer to the gate spacer decreases.

Semiconductor device and method of fabricating the same

A decoration element including: a color developing layer including a light reflective layer and a light absorbing layer provided on the light reflective layer; and a substrate provided on a surface of the color developing layer. The substrate comprises a pattern layer, and the light absorbing layer comprises an aluminum oxynitride (AlON).

Decorative member

The present specification relates to a decorative member comprising a base and inorganic layers comprising a first light absorption layer, a light reflection layer, and a second light absorption layer sequentially provided on the base, in which ΔEindicated in Equation 1 is 1 or more, and a method of manufacturing the decorative member.

Decoration member and decoration member manufacturing method

A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.

Semiconductor devices

The present application relates to a decorative member including a color developing layer including a light reflective layer and a light absorbing layer provided on the light reflective layer; and a substrate provided on one surface of the color developing layer, wherein the light absorbing layer includes a copper oxide (CuO).

A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.

A semiconductor device and a method for making a semiconductor device. The semiconductor device includes an active region on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers and including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically.

Multi-bridge channel transistors with stacked source/drain structure and method of forming the same

The present application relates to a decoration member including a pattern layer provided on one surface of the substrate and including a convex structure or a concave structure arranged two-dimensionally, and a method for preparing the decoration member.

Decoration member and method for manufacturing same

The present disclosure relates to a method for manufacturing a decoration element, the method including depositing a light reflective layer having a structure of two or more islands separated from each other on one surface of a light absorbing layer; and dry etching the light absorbing layer using the island as a mask, wherein a resistance value of the decoration element after the dry etching of the light absorbing layer increases by two times or more compared to before the dry etching of the light absorbing layer.

Method for manufacturing decorative member, and decorative member

A negative electrode for a lithium secondary battery including a negative electrode current collector; and a negative electrode active material layer formed on the negative electrode current collector, wherein the negative electrode active material layer includes graphite and silicon oxide, and lithium is incorporated in the negative electrode active material layer, and a method for preparing the same.

Negative electrode for lithium secondary battery, method for manufacturing same, and lithium secondary battery comprising same

The present disclosure relates to a decoration member comprising a color developing layer comprising a light reflective layer and a light absorbing layer provided on the light reflective layer; and a substrate provided on one surface of the color developing layer, wherein the light absorbing layer comprises a molybdenum-titanium oxide (MoTiO).

Decoration member

A method of preparing a carbon fiber including: preparing a precursor fiber for preparing a carbon fiber; and stabilizing the precursor fiber. The stabilization of the precursor fiber includes a first stabilization phase, a second stabilization phase, a third stabilization phase, and a fourth stabilization phase, which are set at four different temperatures between a temperature at which heat starts to be generated from the stabilization reaction of the precursor fiber and a temperature at which the generation of heat is maximized. Ozone gas is input while at least one phase of the third stabilization phase and the fourth stabilization phase is carried out.

Method of stabilizing precursor fiber for preparing carbon fiber and method of preparing carbon fiber using the same

A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

Growing community of inventors

Daejeon, South Korea

Ki Hwan Kim