Hynix Semiconductor Inc.

Skhynix Inc.

Ki-Hong Lee

Kwon Hong

Moon-Sig Joo

Young-Wook Lee

Won-Joon Choi

Dae-Gyu Shin

Beom-Yong Kim

Eun-Seok Choi

Sun-Hwan Hwang

Se-Yun Lim

Sang-Bum Lee

Ki-Hong Yang

Min-Soo Kim

Jun-Yeol Cho

A method for fabricating a semiconductor device includes forming a through-hole penetrating through an alternating stack pattern and forming a gap-fill layer, wherein a sacrificial gap-fill layer of the gap-fill layer fills the through-hole. The method also includes forming a mask layer over the alternating stack pattern and over the gap-fill layer, wherein the mask layer includes a self-aligned opening overlapping the filled through-hole and overlapping a portion of an uppermost material layer of the alternating stack pattern adjacent to the filled through-hole. The method further includes forming a first contact hole through the alternating stack pattern by performing a single etch using both the mask layer and the portion of the uppermost material layer as etch barriers to remove, through the self-aligned opening, the sacrificial gap-fill layer filling the through-hole.

Method for fabricating semiconductor device

A nonvolatile memory device includes a pipe insulation layer having a pipe channel hole, a pipe gate disposed over the pipe insulation layer, a pair of cell strings each having a columnar cell channel, and a pipe channel coupling the columnar cell channels and surrounding inner sidewalls and a bottom of the pipe channel hole.

Method for fabricating pipe gate nonvolatile memory device

A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.

Non-volatile memory device and method for fabricating the same

A nonvolatile memory device includes a pipe gate having a pipe channel hole; a plurality of interlayer insulation layers and a plurality of gate electrodes alternately stacked over the pipe gate; a pair of columnar cell channels passing through the interlayer insulation layers and the gate electrodes and coupling a pipe channel formed in the pile channel hole; a first blocking layer and a charge trapping and charge storage layer formed on sidewalls of the columnar cell channels; and a second blocking layer formed between the first blocking layer and the plurality of gate electrodes.

Three dimensional pipe gate nonvolatile memory device

Nonvolatile pipe gate memory device

A non-volatile memory includes a channel layer to extend from a substrate in a vertical direction; a plurality of interlayer dielectric layers and a plurality of gate electrodes to be alternately stacked along the channel layer; and a memory layer to be interposed between the channel layer and each of the gate electrodes, wherein the memory layer comprises a tunnel dielectric layer to contact the channel layer, a first charge trap layer to contact the tunnel dielectric layer and formed of an insulating material, a charge storage layer to contact the first charge trap layer and formed of a semiconducting material or a conductive material, a second charge trap layer to contact the charge storage layer and formed of an insulating material, and a charge blocking layer to contact the second charge trap layer.

Nonvolatile memory device

A non-volatile memory device includes a pair of columnar cell channels vertically extending from a substrate, a doped pipe channel arranged to couple lower ends of the pair of columnar cell channels, insulation layers over the substrate in which the doped pipe channel is buried, memory layers arranged to surround side surfaces of the columnar cell channels, and control gate electrodes arranged to surround the memory layers.

A nonvolatile memory device includes a channel protruding in a vertical direction from a substrate, a plurality of interlayer dielectric layers and gate electrode layers which are alternately stacked over the substrate along the channel, and a memory layer formed between the channel and a stacked structure of the interlayer dielectric layers and gate electrode layers. Two or more gate electrode layers of the plurality of gate electrode layers are coupled to an interconnection line to form a selection transistor.

There is provided a nonvolatile memory device having a tunnel dielectric layer formed over a substrate, the charge capturing layer formed over the tunnel dielectric layer and including a combination of at least one charge storage layer and at least one charge trap layer, a charge blocking layer formed over the charge capturing layer, and a gate electrode formed over the charge blocking layer.

Nonvolatile memory device and method of fabricating the same

Provided are a nonvolatile memory device and a method for fabricating the same, which can secure the structural stability of a three-dimensional nonvolatile memory device. The nonvolatile memory device includes one or more columnar channel plugs, a plurality of word lines and a plurality of dielectric layers stacked alternately to surround the columnar channel plug, a memory layer disposed between the word line and the columnar channel plug, a plurality of word line connection portions, each of the word line connection portions connecting ends of word lines of a common layer from among the plurality of word lines, and a plurality of word line extension portions extending from the word line connection portions.

Nonvolatile memory device and method for fabricating the same

A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.

Method for fabricating vertical channel type nonvolatile memory device

A 3D nonvolatile memory device includes: a plurality of channel structures including a plurality of channel layers and interlayer dielectric layers, which are alternately stacked, and extended in a first direction; a plurality of word lines extended in a second direction at least substantially perpendicular to the first direction; a plurality of row select lines connected to the plurality of channel layers, respectively, and extended in the second direction; and a plurality of column select lines connected to the plurality of channel structures, respectively, and extended in the first direction.

Growing community of inventors

Gyeonggi-do, South Korea

Ki-Hong Lee