Servicenow, Inc.

Khosrow Jian Motamedi

Harry Thomas Nelson

Nikhil Prashant Bendre

Sunil Kumar

Fernando Ros

Douglas Andrew Bell

Gregory Allen Krasnow

A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.

Pipelineable and parallelizable streaming parsers for querying structured data-interchange information

Non-volatile memory may contain definitions of: (i) a plurality of message queue implementations respectively associated with different queue behaviors, the different queue behaviors specified by corresponding sets of modes, and (ii) an application programming interface (API) through which applications can access one or more message queues. One or more processors may be configured to: create a message queue of a particular message queue type, supported by a corresponding message queue implementation, by specifying a set of modes corresponding to a queue behavior; receive, from a producing application and by way of the API, one or more messages for the message queue; store the one or more messages in a data structure associated with the message queue; receive, from a consuming application and by way of the API, a request to read from the message queue; and provide a message from the message queue to the consuming application.

Message queue architecture and interface for a multi-application platform

A system includes a processor configured to create a rule repository instance. The rule repository instance specifies a plurality of different procedures that facilitate specifying a sequence of transformer rules by cascading each of the procedures together using a dot notation format. The processor configures the rule repository instance with a plurality of transformer rules using the dot notation format. The processor receives data from a file arranged according to a first structured data format. The processor executes the sequence of transformer rules to convert data elements in the file to a second structured data format. The processor then provides for display or storage the data as converted into the second structured data format by the sequence of transformer rules.

Unified application programming interface for transformation of structured data

A system includes a processor configured to obtain a sequence of transformer rules. The transformer rules specify a set of data elements arranged according to a first structured data format, and structural changes to be performed on the data elements that convert the data elements into a second structured data format. The processor receives a block of data from a file arranged according to the first structured data format. The processor executes the sequence of transformer rules to perform the structural changes to the block of data. When executing the particular transformer rule, the processor applies an adapter associated with the transformer rule to modify values in the block of data specified by the particular transformer. The processor then provides for display or storage the block of data as converted into the second structured data format by the sequence of transformer rules.

Growing community of inventors

San Diego, CA, United States of America

Khosrow Jian Motamedi