Advanced Micro Devices Corporation

Globalfoundries Inc.

Other

Applied Materials, Inc.

Spansion Llc.

Advance Micro Devices, Inc.

Khoi A Phan

Bhanwar Singh

Bharath Rangarajan

Ramkumar Subramanian

Michael K Templeton

Bryan K Choo

Sanjay K Yedur

Srikanteswara Dakshina-Murthy

Christopher F Lyons

Cyrus E Tabery

Steven C Avanzino

Ursula Q Quinto

Gilles Amblard

Arvind Halliyal

Jean Y Yang

Martin Mazur

Jeff P Erhardt

Jeffrey P Erhardt

Carmen L Morales

Jerry Cheng

Iraj Emami

Jonathan Alan Orth

Wolfram Grundke

Richard J Bartlett

Daniel E Sutton

Ian Dudley

David Ashby Steele

Anthony P Coniglio

Gurjeet S Bains

Carol M Bradway

Xianmin Tang

Rongjun Wang

Yong Cao

Huixiong Dai

Khanh B Nguyen

Christopher S Ngai

Weimin Zeng

Daniel Lee Diehl

Robert J Chiu

Yeng-Kaung Peng

Linda S Milor

Quang N Tran

David A Steele

Nicholas R Maccrae

Michael T Templeton

Bernard Matt

Jeff Schefske

Shobhana R Punjabi

Wolfram Porsche

In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.

Methods for depositing amorphous silicon layers or silicon oxycarbide layers via physical vapor deposition

The present invention provides for a system and method for regulating and monitoring heat dissipation of an integrated circuit by employing a heat regulating device with a thermal structure net work assembly. Each thermal structure can act as a heat conducting pathway for inducing heat into and/or dissipating heat away from the integrated circuit, thus creating a more uniform temperature gradient across the semiconductor body.

Mitigating heat in an integrated circuit

A system and method are provided to facilitate dual damascene interconnect integration in a single imprint step. The method provides for creation of a translucent imprint mold with three-dimensional features comprising the dual damascene pattern to be imprinted. The imprint mold is brought into contact with a photopolymerizable organosilicon imaging layer deposited upon a transfer layer which is spin coated or otherwise deposited upon a dielectric layer of a substrate. When the photopolymerizable layer is exposed to a source of illumination, it cures with a structure matching the dual damascene pattern of the imprint mold. A halogen breakthrough etch followed by oxygen transfer etch transfer the vias from the imaging layer into the transfer layer. A second halogen breakthrough etch followed by a second oxygen transfer etch transfer the trenches from the imaging layer into the transfer layer. A dielectric etch transfers the pattern from the transfer layer into the dielectric layer. A metal fill process then fills the dual damascene openings of the dielectric layer with metal.

System and method for imprint lithography to facilitate dual damascene integration in a single imprint act

A mask is provided to be used with nanoprint lithography processes to facilitate reproduction of small features required for the production of integrated circuits. A translucent substrate is provided along with one or more three-dimensional features that include one or more vertical sidewalls. An absorbing material is deposited upon one or more of the vertical sidewalls so that light in an incident direction to an upper surface of the substrate will be absorbed by the absorbing material, resulting in light blocking features. One or more horizontal surfaces are formed upon one or more of the three-dimensional features, which allow light rays to exit a lower surface of the substrate unobstructed by the absorbing material.

Mask having sidewall absorbers to enable the printing of finer features in nanoprint lithography (1XMASK)

The present invention provides a system and methodology for dummy-dispensing resist though a dispense head while mitigating waste associated with the dummy-dispense process. The dummy dispensed resist is returned to a reservoir from which it was taken. Between substrate applications, the dispense head can be positioned to dispense resist into a return line. The flow of resist from the dispense head keeps resist from drying at the dispense head. By funneling the dummy-dispensed resist into a return line with low volume, for example, waste from the dummy-dispensing process can be mitigated.

Recirculation and reuse of dummy dispensed resist

The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for retrograde feature profiles on an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature profile via employing a scatterometry system to detect retrograde feature profiles, and mitigating the retrograde profiles via a spacer etchback procedure.

Feedback control of imprint mask feature profile using scatterometry and spacer etchback

Disclosed are immersion lithography methods involving irradiating a first photoresist through a lens and an immersion liquid, the immersion liquid contacting the lens and the first photoresist in a first apparatus; contacting the lens with a supercritical fluid in a second apparatus; and irradiating a second photoresist through the lens and an immersion liquid, the immersion liquid contacting the lens and the second photoresist in the first apparatus.

Using supercritical fluids to clean lenses and monitor defects

Systems and methodologies are provided that account for surface variations of a wafer by adjusting grating features of an imprint lithography mask. Such adjustment employs piezoelectric elements as part of the mask, which can change dimensions (e.g., a height change) and/or move when subjected to an electric voltage. Accordingly, by regulating the amount of electric voltage applied to the piezoelectric elements a controlled expansion for such elements can be obtained, to accommodate for topography variations of the wafer surface.

Systems and methods of imprint lithography with adjustable mask

Disclosed are systems and methods that employ a structural framework of cell gratings placed on a wafer surface during an immersion lithography process to restrict motion of the immersion fluid. Thus, when the stepper lens comes in contact with the immersion fluid, a typically stable immersion fluid dynamics can be maintained with the cells during the immersion lithography process. In addition, various monitoring and control systems are employed to regulate stability of the immersion fluid.

Frame structure for turbulence control in immersion lithography

Disclosed are immersion lithography methods and systems involving irradiating a photoresist through a lens and an immersion liquid of an immersion lithography tool, the immersion liquid in an immersion space contacting the lens and the photoresist; removing the immersion liquid from the immersion space; charging the immersion space with a supercritical fluid; removing the supercritical fluid from the immersion space; and charging the immersion space with immersion liquid.

Use of supercritical fluid to dry wafer and clean lens in immersion lithography

A system and method are provided for detecting contaminants or defects on a reticle in-situ. The system and method provide a system that measures the optical transmission through clear areas on a reticle and determines whether the optical transmission of a reticle has been degraded by contaminants or other defects.

In-situ reticle contamination detection system at exposure wavelength

A system and method for detecting bubbles in a lithographic immersion medium and for controlling a lithographic process based at least in part on the detection of bubbles is provided. A bubble monitoring component emits an incident beam that passes through the immersion medium and is incident upon a substrate to produce a reflected and/or diffracted beam(s). The reflected and/or diffracted beam(s) is received by one or more optical detectors. The presence or absence of bubbles can be derived from information extracted by scatterometry from the reflected and/or diffracted beams. A process control component interacts with a positioning component and an optical exposure component to alter a lithographic process based at least in part on the results of the scatterometry.

In-situ defect monitor and control system for immersion medium in immersion lithography

Systems and/or methods are disclosed for aligning multiple layers of a multi-layer semiconductor device fabrication process and/or system utilizing a composite alignment mark. A component is provided to form the composite alignment mark, such that a first portion of the composite alignment mark is associated with a layer of the wafer and a second portion of the composite alignment mark is associated with a disparate layer of the wafer. An alignment component is utilized to align a reticle for a layer to be patterned to the composite alignment mark.

Composite alignment mark scheme for multi-layers in lithography

The present invention relates to monitoring and controlling a reticle fabrication process (e.g. employed with an electron beam lithography process). A typical fabrication process involves discrete stages including exposure, post-exposure bake and development. After fabrication is complete, an inspection can be performed on the reticle to determine whether any parameters during fabrication and/or any data points are outside of acceptable tolerances. The data is collected and fed into an algorithm (e.g. data-mining algorithm) utilized to determine which fabrication parameters need to be modified then sends the data to a control system (e.g. advanced process control) to facilitate needed changes to the fabrication parameters.

Systems and methods that employ exposure compensation to provide uniform CD control on reticle during fabrication

The present invention relates to visually monitoring an interior portion of a processing chamber in a semiconductor processing system. An image collector collects images of the interior of the chamber and provides an image signal indicative of a visual representation of the interior of the chamber. A viewing station receives the image signal and displays a visual representation of the interior of the chamber.

System and method for visually monitoring a semiconductor processing system

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San Jose, CA, United States of America

Khoi A Phan