Sandisk Technologies Inc.

Sandisk Corporation

Khin Htoo

Feng Q Pan

Jonathan Huynh

Yuxin Wang

Albert Chang

Qui V Nguyen

Sung-En Wang

Trung Pham

Byungki Woo

Matt Chen

Supraja Sundaresan

Primit Modi

Disclosed is a device including a sinking circuit to sink current from an output node and a driver circuit coupled to the sinking circuit. The driver circuit includes complementary differential pairs to receive a voltage at the output node and generate a control signal according to the received voltage. The sinking circuit is configured to change the current from the output node according to the control signal.

Distributed sinking circuit control for memory device

Disclosed is a device including a distributed controller and a common controller. The distributed controller includes a first circuit to generate an output voltage according to a control signal. The common controller includes a common feedback loop coupled to the distributed controller. The common feedback loop includes an amplifier circuit to generate the control signal, and a second circuit coupled to the amplifier circuit. The second circuit replicates the first circuit and stabilizes the control signal.

Memory control circuit with distributed architecture

Disclosed is a device including a selected distributed driver, a first feedback control circuit, and a second feedback control circuit. The first feedback control circuit is coupled to the selected distributed driver. The first feedback control circuit is configured to maintain an output of the selected distributed driver within a first predetermined range. The second feedback control circuit is selectively coupled to the selected distributed driver and is configured to maintain the output of the selected distributed driver to be within a second predetermined range. The second predetermined range is within the first predetermined range.

Bias control circuit with distributed architecture for memory cells

A circuit for supplying a high voltage to load is described. An example of such a circuit could be used in the peripheral circuitry of a non-volatile memory device for supplying a program voltage from a charge pump to a selected word line. The circuit includes a charge pump that generates the high voltage and decoding circuitry that is connected to receive this high voltage and selectively apply it to a load. The decoding circuitry receives the high voltage through a switch, where the switch is of a variable resistance that progressively passes the high voltage in response to a control signal. In a particular example, the switch includes a transistor connected between the charge pump and the decoding circuitry, where the control gate of the transistor is connected to the output of a second charge pump that is connected to receive the high voltage and a settable clock signal as its inputs.

Variable resistance switch suitable for supplying high voltage to drive load

A charge pump system uses a dynamic switching approach, where the pump connections are independent of the load for each output. One large pump is designed to be shared between all of the outputs for use during the ramp up during recovery, with each output level also have one designated pump to maintain its level when under regulation. Each small pump is designed with capability that can maintain its output at its regulation level. Each of these pumps can be tailored to the corresponding output level, such as the number of stages being higher in the pump to supply the higher output level. The large pump unit is constructed to be ample to provide sufficient drive to be able to assist in the ramp up phase for all of the outputs and has as many switches needed to connect the pump with all the needed outputs.

Dynamic switching approach to reduce area and power consumption of high voltage charge pumps

A charge pump circuit for generating an output voltage is described. Charge pump circuits typically have two branches. As the clocks supplying the branches of a charge pump circuit alternate, the output of each branch will alternately provide an output voltage, which are then combined to form the pump output. The techniques described here allow charge to be transferred between the two branches, so that as the capacitor of one branch discharges, it is used to charge up the capacitor in the other branch. An exemplary embodiment using a voltage doubler-type of circuit, with the charge transfer between the branches accomplished using a switch controller by a boosted version of the clock signal, which is provided by a one-sided voltage doubler.

Charge pump with reduced energy consumption through charge sharing and clock boosting suitable for high voltage word line in flash memories

A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.

Bandgap voltage and temperature coefficient trimming algorithm

A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the node supplies the reference voltage. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.

Techniques and corresponding circuitry for deriving a supply a bias voltage for a memory cell array from a received reference voltage is presented. The circuit includes a voltage determination circuit, which is connected to receive the reference voltage and generate from it the bias voltage, a temperature sensing circuit, and a calibration circuit. The calibration circuit is connected to receive the bias voltage and to receive a temperature indication from the temperature sensing circuit and determine from the bias voltage and temperature indication a compensation factor that is supplied to the voltage determination circuit, which adjusts the bias voltage based upon the compensation factor.

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Sunnyvale, CA, United States of America

Khin Htoo