Microelectronics Technology, Inc.

Hughes Aircraft Company

Raytheon Company

Hon Hai Precision Industry Co., Ltd.

Khiem V Cai

David B Rutan

Don C Devendorf

Roger J O'Connor

Matthew S Gorder

Ahmad Khanifar

Armando C Cova

Samuel Davis Kent, Iii

James L Thomas

Patrick L Lim

Lloyd Frederick Linder

Robert A Dell-Imagine

Robert L Hartman

Steven R Severance

Allan L Levine, Jr

Samuel D Kent

Systems, methods, and computer-readable storage devices relate to a process for beamforming in a system. An available spectrum is divided into M sub-bands, with each of the M sub-bands having N beams. The system, through using M&#xd7;N available beams, can maintain frequency domain and spatial domain orthogonality. A method includes receiving a direction indicating a location of a device relative to a transmitter and selecting a beam from the M&#xd7;N beams. The beam can be a data beam for transmitting data to the device or a null to suppress interference. The bandwidth, spectrum and/or direction associated with the beam can be chosen and/or varied based on one of any number of parameters such as avoiding channel distortions, reducing mismatch in amplitude and/or delay, and adapting to a data type or data amount. Frequency assignments can be staggered through a cell-based region to reduce cell interference in assigning beams.

System and method for spatial on sub-band massive MIMO/BFN to provide a large number of orthogonal channels

A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N&#x2212;1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.

Dynamic digital pre-distortion system

A system and method for stabilizing a coefficient set used by a digital predistortion (DPD) engine to apply pre-distortion to a transmit signal and cancel distortion generated by a distorting element or distorting system when transmitting the transmit signal, including obtaining an initial coefficient set; rotating the initial coefficient set to maintain a phase of fundamental components (w(t), . . . , w(t)) of the initial coefficient set as a constant value; averaging in the time domain the rotated coefficient set to obtain an averaged coefficient set; applying the averaged coefficient set to the DPD engine, the initial coefficient set expressed in a first equation [27]; computing the phase of the fundamental components of the initial coefficient set with a second equation [28]; and computing the rotated coefficient set with a third equation [29].

Digital pre-distortion technique using nonlinear filters

A system and method for performing digital crest factor reduction. In one embodiment, the method is devised to suppress the signal amplitude to maintain a low signal peak to average ratio (PAR), while maintaining a desirable Error Vector Magnitude (EVM). This technique may be designed to operate in highly dynamic signal conditions.

Dynamic crest factor reduction system

A method and computer program product for operating a linearizer for a circuit, including generating a set of coefficients via a characterizer; predistorting a signal input to the circuit responsive to the coefficients and generating a linearized output in response thereto; filtering the signal through a linear digital filter having linear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; generating powers of the signal; inputting the generated powers of the signal through tapped delay lines, each line having nonlinear digital filter taps, each tap other than a first tap being successively delayed by one delay unit; applying the coefficients to the linear and nonlinear digital filter taps; summing each of the nonlinear digital filter taps corresponding to a certain number of delay units; and adding the sum of each of the delay units to a particular linear digital filter tap.

A crest reduction system and method. The inventive system includes a first circuit for suppressing peak amplitudes of an input signal and providing a peak amplitude suppressed signal in response thereto and a second circuit coupled to the first circuit for rejecting intermodulation distortion in the amplitude suppressed signal. In the illustrative implementation, the first circuit is a peak amplitude suppressor having circuitry for computing an amplitude of the input signal and for computing a gain factor for the input signal in response thereto. In the best mode, the gain factor is obtained from a lookup table. The peak amplitude suppressor further includes a multiplier for applying the gain factor to the input signal. In the illustrative embodiment, the second circuit includes a plurality of bandpass filters and a summer for combining the outputs thereof.

System and method for crest factor reduction

A system, method and computer program product for stabilizing a coefficient set used by a digital predistortion (DPD) engine to apply pre-distortion to a transmit signal and cancel distortion generated by a distorting element or distorting system when transmitting the transmit signal, including obtaining an initial coefficient set; rotating the initial coefficient set to maintain a phase of fundamental components (w(t), . . . , w(t)) of the initial coefficient set a constant value; averaging the rotated coefficient set to obtain an averaged coefficient set; and applying the averaged coefficient set to the DPD engine.

Digital pre-distortion technique using non-linear filters

A linearizer and method. In a most general embodiment, the inventive linearizer includes a characterizer coupled to an input to and an output from said circuit for generating a set of coefficients and a predistortion engine responsive to said coefficients for predistorting a signal input to said circuit such that said circuit generates a linearized output in response thereto. In a specific application, the circuit is a power amplifier into which a series of pulses are sent during an linearizer initialization mode of operation. In a specific implementation, the characterizer analyzes finite impulse responses of the amplifier in response to the initialization pulses and calculates the coefficients for the feedback compensation filter in response thereto. In the preferred embodiment, the impulse responses are averaged with respect to a threshold to provide combined responses. In the illustrative embodiment, the combined responses are Fast Fourier Transformed, reciprocated and then inverse transformed. The data during normal operation is fed back to the data capture, corrected for distortion in the feedback path from the output of the amplifier, converted to basedband, synchronized and used to provide the coefficients for the predistortion linearization engine. As a result, in the best mode, each of the coefficients used in the predistortion linearization engine can be computed by solving the matrix equation HW=S for W, where W is a vector of the weights, S is a vector of predistortion linearization engine outputs, and H is a matrix of PA return path inputs as taught herein.

A digitizing analog front end (DAFE) using mixed technology on a single substrate is described. SiGe BiCMOS technology is implemented for the semiconductor components, which include a low noise amplifier and an analog-to-digital converter. Micro Electro Mechanical System (MEMS) switches are used to change the filtering characteristics of several filters, including an anti-aliasing filter and a pre-select and anti-jamming filter.

Mixed technology MEMS/SiGe BiCMOS digitalized analog front end with direct RF sampling

A system and method for forming a beam and creating nulls. The inventive method combines frequency domain suppression technology for narrow-band jammer rejection with orthogonal weighting using Eigen analysis for jammer nulling and signal beam-forming for an array antenna system. The inventive system is adapted for use with an adaptive array antenna having a plurality of radiating elements. The system includes a frequency domain suppressor connected to the array antenna and an orthogonal weighting subsystem connected to the frequency domain suppressor. In the illustrative implementation, signals received by each radiating elements are processed by an analog front-end and digitized. The frequency domain suppressor includes a Fast Fourier transformer (FFT) and a frequency domain suppressor for each element in the array. The frequency domain suppressor further includes a threshold evaluator which reads the signals output by the FFT's and provides threshold controls to the spectral suppressors. The orthogonal subsystem includes an adaptive weighting unit connected to the output of each of the spectral suppressors. The orthogonal weighting subsystem further includes an orthogonal weighting estimator for determining and optimal orthogonal Eigen-weighting to be applied to each of the adaptive weighting units. The outputs of each of the adaptive weighting processors are combined and inverse Fast Fourier transformed to provide one or more output beams and or one or more nulls in an efficient manner designed to leave the system with at least one degree of freedom for other functions.

System and method for forming a beam and creating nulls with an adaptive array antenna using antenna excision and orthogonal Eigen-weighting

The present invention is a method of synchronizing a digital receiver to a digital transmitter in both frequency and time using a novel ambiguity transformation. The ambiguity transform combines time correlation and spectrum synchronization into an integrated two-dimensional transform process. The ambiguity transform includes the steps of multiplying a reference sequence with a received signal to create a product signal, calculating the magnitude of the spectrum of the product signal, and determining the peak product signal. Through multiple iterations of the ambiguity transform, and time and frequency shifts, a digital receiver may be synchronized to a digital transmitter. The method of the present invention may be implemented using a digital signal processor (DSP).

Rapid time and frequency acquistion of spread spectrum waveforms via

A digital signal processor is provided which is compatible with a large variety of modulation processes (e.g., BPSK, QPSK,.pi./4 QPSK, M-ary FSK and M-ary PSK). The processor has a transmit section which can convert input data streams into baseband I and Q signals and a receive section which can recover data streams from input baseband I and Q signals. The transmit section includes a direct I/Q modulator and a common phase modulator and the receive section includes an M-FSK to M-PSK converter and a common phase demodulator. The processor is particularly suited for realization as an application-specific integrated circuit (ASIC) which can be integrated in multiband, multimode transceivers.

Communication signal processors and methods

Apparatus and a method for generating a digital synthesized Gaussian noise-like waveform that may be used to modulate and demodulate communication data. The present invention uses a seed input that addresses a read only memory look-up table, for example, containing digital samples having Gaussian statistics. A sequence generator generates a pair of pseudo-random sequences in response to the seed input that address the read only memory to look up and output a pair of pseudo-random Gaussian samples that are used to generate the Gaussian noise-like waveform. A processor converts the pair of pseudo-random Gaussian samples into corresponding analog I and Q signals, and a modulator 33 modulates the analog I and Q signals to generate a modulated output signal having the Gaussian noise-like waveform.

Growing community of inventors

Brea, CA, United States of America

Khiem V Cai