Tritech Microelectronics International Ltd.

Cirrus Logic Inc.

Kheng Boon Peh

Maisy Mun Ng

Jie Liang

Eng Han Lee

This invention describes an apparatus and method for the fast and efficient generation of addresses for a circular buffer involving only addition. The invention uses as input the present address, the base address, the length of the circular buffer and the address offset to the next address. The address offset can be either a positive or negative value, and the polarity of the offset is used to control different operations within the apparatus. The apparatus is constructed of two adders, a comparator and a multiplexer, and the next address is selected from the output of either of the two adders based on the output of the comparator.

Address generator for a circular buffer

The present invention provides a voltage controlled oscillator with improved noise immunity and minimized variation due to manufacturing process, power supply and operating temperature changes. The voltage controlled oscillator consists of fully differential connected ring oscillator that includes a plurality of differentially connected delay elements. The ring oscillator responds to a control current signal for controlling the frequency of oscillation. A voltage to current converter converts the input tuning voltage to an output current for the controlling of the ring oscillator. The delay element consists of two source coupled P-channel transistors connected to a current source. The drains of the P-channel transistors are each connected to a voltage controlled impedance that changes the delay characteristics of the delay element in response to the input tuning voltage. A voltage reference generator provides the reference voltage necessary to determine the amplitude out of the delay element and is insensitive to variations due to manufacturing process, power supply, and operating temperature. A fully differential comparator provides symmetrical loading for the ring oscillator and the high gain necessary to provide the output drive capability.

Embedded voltage controlled oscillator with minimum sensitivity to

A multiply/accumulate computation circuit is provided. The circuit will perform the multiplication of a first binary number that is a multiplicand and a second binary number that is a multiplier to produce a product. The product can be added or subtracted from a previous result. The product may be negated. The product may be multiplied by a factor of two. Or the product that is multiplied by the factor of two may be added or subtracted from the previous result. The multiplication is accomplished in a modified Radix 4 Booth's encoding and translation circuit to produce a set of partial products that are combined in a n operand adder to form a final result.

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Singapore, Singapore

Kheng Boon Peh